This is an automated email from Gerrit. Matthias Welwarsky ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/3023
-- gerrit commit e52837a0af6cca2db75f48c2a326dd8da73ac4ee Author: Matthias Welwarsky <[email protected]> Date: Thu Oct 15 21:38:41 2015 +0200 armv7a: correct line length of outer cache ARM PL310 outer cache controller has a line length of 32 byte. Change-Id: If8d87a03281d0f4ad402909998e7834eb4837e79 Signed-off-by: Matthias Welwarsky <[email protected]> diff --git a/src/target/armv7a_cache_l2x.c b/src/target/armv7a_cache_l2x.c index eb3c472..5af589e 100644 --- a/src/target/armv7a_cache_l2x.c +++ b/src/target/armv7a_cache_l2x.c @@ -108,7 +108,7 @@ static int armv7a_l2x_cache_inval_virt(struct target *target, uint32_t virt, struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *) (armv7a->armv7a_mmu.armv7a_cache.outer_cache); /* FIXME: different controllers have different linelen */ - uint32_t i, linelen = 1024 * 8; + uint32_t i, linelen = 32; int retval; retval = arm7a_l2x_sanity_check(target); @@ -144,7 +144,7 @@ static int armv7a_l2x_cache_clean_virt(struct target *target, uint32_t virt, struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *) (armv7a->armv7a_mmu.armv7a_cache.outer_cache); /* FIXME: different controllers have different linelen */ - uint32_t i, linelen = 1024 * 8; + uint32_t i, linelen = 32; int retval; retval = arm7a_l2x_sanity_check(target); -- ------------------------------------------------------------------------------ _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
