This is an automated email from Gerrit. Alamy Liu ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/3260
-- gerrit commit 319329abe7aa3c5c1b573a84befc22ed9bfbbde7 Author: Alamy Liu <[email protected]> Date: Tue May 26 11:09:14 2015 -0700 64-bit: 32-bit targets stay with uint32_t Change-Id: I8ab4bfff99a5945d8f2d1e3a459f372f7be03da0 Signed-off-by: Alamy Liu <[email protected]> diff --git a/src/target/arm11.c b/src/target/arm11.c index 0cb1d8c..e27a5f8 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -461,7 +461,7 @@ static int arm11_resume(struct target *target, int current, for (bp = target->breakpoints; bp; bp = bp->next) { if (bp->address == address) { - LOG_DEBUG("must step over %08" PRIx32 "", bp->address); + LOG_DEBUG("must step over %08" PRIx32 "", (uint32_t)bp->address); arm11_step(target, 1, 0, 0); break; } @@ -488,7 +488,7 @@ static int arm11_resume(struct target *target, int current, CHECK_RETVAL(arm11_sc7_run(arm11, brp, ARRAY_SIZE(brp))); LOG_DEBUG("Add BP %d at %08" PRIx32, brp_num, - bp->address); + (uint32_t)bp->address); brp_num++; } diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 7b40f50..b3671df 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -105,7 +105,7 @@ static void arm7_9_assign_wp(struct arm7_9_common *arm7_9, struct breakpoint *br LOG_ERROR("BUG: no hardware comparator available"); LOG_DEBUG("BPID: %" PRId32 " (0x%08" PRIx32 ") using hw wp: %d", breakpoint->unique_id, - breakpoint->address, + (uint32_t)breakpoint->address, breakpoint->set); } @@ -191,7 +191,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32 ", Type: %d", breakpoint->unique_id, - breakpoint->address, + (uint32_t)breakpoint->address, breakpoint->type); if (target->state != TARGET_HALTED) { @@ -247,7 +247,8 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break return retval; if (verify != arm7_9->arm_bkpt) { LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" PRIx32 - " - check that memory is read/writable", breakpoint->address); + " - check that memory is read/writable", + (uint32_t)breakpoint->address); return ERROR_OK; } } else { @@ -267,7 +268,8 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break return retval; if (verify != arm7_9->thumb_bkpt) { LOG_ERROR("Unable to set thumb software breakpoint at address %08" PRIx32 - " - check that memory is read/writable", breakpoint->address); + " - check that memory is read/writable", + (uint32_t)breakpoint->address); return ERROR_OK; } } @@ -303,7 +305,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32, breakpoint->unique_id, - breakpoint->address); + (uint32_t)breakpoint->address); if (!breakpoint->set) { LOG_WARNING("breakpoint not set"); @@ -1720,7 +1722,7 @@ int arm7_9_resume(struct target *target, buf_get_u32(arm->pc->value, 0, 32)); if (breakpoint != NULL) { LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (id: %" PRId32, - breakpoint->address, + (uint32_t)breakpoint->address, breakpoint->unique_id); retval = arm7_9_unset_breakpoint(target, breakpoint); if (retval != ERROR_OK) @@ -1778,7 +1780,8 @@ int arm7_9_resume(struct target *target, LOG_DEBUG("new PC after step: 0x%8.8" PRIx32, buf_get_u32(arm->pc->value, 0, 32)); - LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address); + LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", + (uint32_t)breakpoint->address); retval = arm7_9_set_breakpoint(target, breakpoint); if (retval != ERROR_OK) return retval; diff --git a/src/target/avr32_ap7k.c b/src/target/avr32_ap7k.c index 55d1efb..a9c0bbc 100644 --- a/src/target/avr32_ap7k.c +++ b/src/target/avr32_ap7k.c @@ -350,7 +350,8 @@ static int avr32_ap7k_resume(struct target *target, int current, /* Single step past breakpoint at current address */ breakpoint = breakpoint_find(target, resume_pc); if (breakpoint) { - LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address); + LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", + (uint32_t)breakpoint->address); #if 0 avr32_ap7k_unset_breakpoint(target, breakpoint); avr32_ap7k_single_step_core(target); diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 6786c46..b333e4e 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -753,7 +753,7 @@ static int cortex_m_resume(struct target *target, int current, breakpoint = breakpoint_find(target, resume_pc); if (breakpoint) { LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (ID: %" PRIu32 ")", - breakpoint->address, + (uint32_t)breakpoint->address, breakpoint->unique_id); cortex_m_unset_breakpoint(target, breakpoint); cortex_m_single_step_core(target); @@ -1195,7 +1195,7 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint LOG_DEBUG("BPID: %" PRIu32 ", Type: %d, Address: 0x%08" PRIx32 " Length: %d (set=%d)", breakpoint->unique_id, (int)(breakpoint->type), - breakpoint->address, + (uint32_t)breakpoint->address, breakpoint->length, breakpoint->set); @@ -1216,7 +1216,7 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi LOG_DEBUG("BPID: %" PRIu32 ", Type: %d, Address: 0x%08" PRIx32 " Length: %d (set=%d)", breakpoint->unique_id, (int)(breakpoint->type), - breakpoint->address, + (uint32_t)breakpoint->address, breakpoint->length, breakpoint->set); diff --git a/src/target/hla_target.c b/src/target/hla_target.c index d0be966..e387a69 100644 --- a/src/target/hla_target.c +++ b/src/target/hla_target.c @@ -645,7 +645,7 @@ static int adapter_resume(struct target *target, int current, breakpoint = breakpoint_find(target, resume_pc); if (breakpoint) { LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (ID: %" PRIu32 ")", - breakpoint->address, + (uint32_t)breakpoint->address, breakpoint->unique_id); cortex_m_unset_breakpoint(target, breakpoint); diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index e97626c..350330c 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -1034,7 +1034,8 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are ejtag_info->fast_access_save = write_t; } - LOG_DEBUG("%s using 0x%.8" PRIx32 " for write handler", __func__, source->address); + LOG_DEBUG("%s using 0x%.8" PRIx32 " for write handler", __func__, + (uint32_t)source->address); jmp_code[0] |= UPPER16(source->address); jmp_code[1] |= LOWER16(source->address); diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 5b740cc..2738e72 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -464,7 +464,8 @@ static int mips_m4k_internal_restore(struct target *target, int current, /* Single step past breakpoint at current address */ breakpoint = breakpoint_find(target, resume_pc); if (breakpoint) { - LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address); + LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", + (uint32_t)breakpoint->address); mips_m4k_unset_breakpoint(target, breakpoint); mips_m4k_single_step_core(target); mips_m4k_set_breakpoint(target, breakpoint); @@ -651,7 +652,8 @@ static int mips_m4k_set_breakpoint(struct target *target, return retval; if (verify != MIPS32_SDBBP) { LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx32 - " - check that memory is read/writable", breakpoint->address); + " - check that memory is read/writable", + (uint32_t)breakpoint->address); return ERROR_OK; } } else { @@ -670,7 +672,8 @@ static int mips_m4k_set_breakpoint(struct target *target, return retval; if (verify != MIPS16_SDBBP) { LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx32 - " - check that memory is read/writable", breakpoint->address); + " - check that memory is read/writable", + (uint32_t)breakpoint->address); return ERROR_OK; } } @@ -1172,7 +1175,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, fast_data_area->address <= address + count) { LOG_ERROR("fast_data (0x%8.8" PRIx32 ") is within write area " "(0x%8.8" PRIx32 "-0x%8.8" PRIx32 ").", - fast_data_area->address, address, address + count); + (uint32_t)fast_data_area->address, address, address + count); LOG_ERROR("Change work-area-phys or load_image address!"); return ERROR_FAIL; } diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c index ac2aad0..f502888 100644 --- a/src/target/nds32_v2.c +++ b/src/target/nds32_v2.c @@ -115,7 +115,7 @@ static int nds32_v2_activate_hardware_breakpoint(struct target *target) aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + hbr_index, 0xA); LOG_DEBUG("Add hardware BP %" PRId32 " at %08" PRIx32, hbr_index, - bp->address); + (uint32_t)bp->address); hbr_index++; } else { @@ -142,7 +142,7 @@ static int nds32_v2_deactivate_hardware_breakpoint(struct target *target) return ERROR_FAIL; LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" PRIx32, hbr_index, - bp->address); + (uint32_t)bp->address); hbr_index++; } @@ -186,8 +186,8 @@ static int nds32_v2_activate_hardware_watchpoint(struct target *target) /* set value */ aice_write_debug_reg(aice, NDS_EDM_SR_BPV0 + wp_num, 0); - LOG_DEBUG("Add hardware wathcpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32, wp_num, - wp->address, wp->mask); + LOG_DEBUG("Add hardware wathcpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32, + wp_num, (uint32_t)wp->address, wp->mask); } @@ -207,7 +207,7 @@ static int nds32_v2_deactivate_hardware_watchpoint(struct target *target) aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, 0x0); LOG_DEBUG("Remove hardware wathcpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32, - wp_num, wp->address, wp->mask); + wp_num, (uint32_t)wp->address, wp->mask); } return ERROR_OK; diff --git a/src/target/nds32_v3.c b/src/target/nds32_v3.c index 2246650..8cfb363 100644 --- a/src/target/nds32_v3.c +++ b/src/target/nds32_v3.c @@ -56,7 +56,7 @@ static int nds32_v3_activate_hardware_breakpoint(struct target *target) aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + hbr_index, 0xA); LOG_DEBUG("Add hardware BP %" PRId32 " at %08" PRIx32, hbr_index, - bp->address); + (uint32_t)bp->address); } else { return ERROR_FAIL; } @@ -84,7 +84,7 @@ static int nds32_v3_deactivate_hardware_breakpoint(struct target *target) } LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" PRIx32, hbr_index, - bp->address); + (uint32_t)bp->address); } return ERROR_OK; @@ -131,7 +131,7 @@ static int nds32_v3_activate_hardware_watchpoint(struct target *target) aice_write_debug_reg(aice, NDS_EDM_SR_BPV0 + wp_num, 0); LOG_DEBUG("Add hardware wathcpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32, - wp_num, wp->address, wp->mask); + wp_num, (uint32_t)wp->address, wp->mask); wp_num++; } else if (nds32_v3->nds32.global_stop) { @@ -173,7 +173,7 @@ static int nds32_v3_deactivate_hardware_watchpoint(struct target *target) LOG_DEBUG("Remove hardware wathcpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32, wp_num, - wp->address, wp->mask); + (uint32_t)wp->address, wp->mask); wp_num++; } else if (nds32_v3->nds32.global_stop) { clean_global_stop = true; diff --git a/src/target/nds32_v3m.c b/src/target/nds32_v3m.c index accc8d0..004fe29 100644 --- a/src/target/nds32_v3m.c +++ b/src/target/nds32_v3m.c @@ -53,7 +53,7 @@ static int nds32_v3m_activate_hardware_breakpoint(struct target *target) aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + brp_num, 0xA); LOG_DEBUG("Add hardware BP %u at %08" PRIx32, brp_num, - bp->address); + (uint32_t)bp->address); brp_num--; } else { @@ -81,7 +81,7 @@ static int nds32_v3m_deactivate_hardware_breakpoint(struct target *target) return ERROR_FAIL; LOG_DEBUG("Remove hardware BP %u at %08" PRIx32, brp_num, - bp->address); + (uint32_t)bp->address); brp_num--; } @@ -128,7 +128,8 @@ static int nds32_v3m_activate_hardware_watchpoint(struct target *target) aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, wp_config); LOG_DEBUG("Add hardware wathcpoint %" PRId32 " at %08" PRIx32 - " mask %08" PRIx32, wp_num, wp->address, wp->mask); + " mask %08" PRIx32, wp_num, + (uint32_t)wp->address, wp->mask); wp_num++; } else if (nds32_v3m->nds32.global_stop) { @@ -169,7 +170,8 @@ static int nds32_v3m_deactivate_hardware_watchpoint(struct target *target) aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, 0x0); LOG_DEBUG("Remove hardware wathcpoint %" PRId32 " at %08" PRIx32 - " mask %08" PRIx32, wp_num, wp->address, wp->mask); + " mask %08" PRIx32, wp_num, + (uint32_t)wp->address, wp->mask); wp_num++; } else if (nds32_v3m->nds32.global_stop) { clean_global_stop = true; diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c index 33de63e..3bddde8 100644 --- a/src/target/openrisc/or1k.c +++ b/src/target/openrisc/or1k.c @@ -858,7 +858,8 @@ static int or1k_resume_or_step(struct target *target, int current, /* Single step past breakpoint at current address */ breakpoint = breakpoint_find(target, resume_pc); if (breakpoint) { - LOG_DEBUG("Unset breakpoint at 0x%08" PRIx32, breakpoint->address); + LOG_DEBUG("Unset breakpoint at 0x%08" PRIx32, + (uint32_t)breakpoint->address); retval = or1k_remove_breakpoint(target, breakpoint); if (retval != ERROR_OK) return retval; @@ -920,7 +921,7 @@ static int or1k_add_breakpoint(struct target *target, uint8_t data; LOG_DEBUG("Adding breakpoint: addr 0x%08" PRIx32 ", len %d, type %d, set: %d, id: %" PRId32, - breakpoint->address, breakpoint->length, breakpoint->type, + (uint32_t)breakpoint->address, breakpoint->length, breakpoint->type, breakpoint->set, breakpoint->unique_id); /* Only support SW breakpoints for now. */ @@ -929,13 +930,13 @@ static int or1k_add_breakpoint(struct target *target, /* Read and save the instruction */ int retval = du_core->or1k_jtag_read_memory(&or1k->jtag, - breakpoint->address, + (uint32_t)breakpoint->address, 4, 1, &data); if (retval != ERROR_OK) { LOG_ERROR("Error while reading the instruction at 0x%08" PRIx32, - breakpoint->address); + (uint32_t)breakpoint->address); return retval; } @@ -956,13 +957,13 @@ static int or1k_add_breakpoint(struct target *target, if (retval != ERROR_OK) { LOG_ERROR("Error while writing OR1K_TRAP_INSTR at 0x%08" PRIx32, - breakpoint->address); + (uint32_t)breakpoint->address); return retval; } /* invalidate instruction cache */ retval = du_core->or1k_jtag_write_cpu(&or1k->jtag, - OR1K_ICBIR_CPU_REG_ADD, 1, &breakpoint->address); + OR1K_ICBIR_CPU_REG_ADD, 1, (uint32_t *)&breakpoint->address); if (retval != ERROR_OK) { LOG_ERROR("Error while invalidating the ICACHE"); return retval; @@ -978,7 +979,7 @@ static int or1k_remove_breakpoint(struct target *target, struct or1k_du *du_core = or1k_to_du(or1k); LOG_DEBUG("Removing breakpoint: addr 0x%08" PRIx32 ", len %d, type %d, set: %d, id: %" PRId32, - breakpoint->address, breakpoint->length, breakpoint->type, + (uint32_t)breakpoint->address, breakpoint->length, breakpoint->type, breakpoint->set, breakpoint->unique_id); /* Only support SW breakpoints for now. */ @@ -994,13 +995,13 @@ static int or1k_remove_breakpoint(struct target *target, if (retval != ERROR_OK) { LOG_ERROR("Error while writing back the instruction at 0x%08" PRIx32, - breakpoint->address); + (uint32_t)breakpoint->address); return retval; } /* invalidate instruction cache */ retval = du_core->or1k_jtag_write_cpu(&or1k->jtag, - OR1K_ICBIR_CPU_REG_ADD, 1, &breakpoint->address); + OR1K_ICBIR_CPU_REG_ADD, 1, (uint32_t *)&breakpoint->address); if (retval != ERROR_OK) { LOG_ERROR("Error while invalidating the ICACHE"); return retval; diff --git a/src/target/x86_32_common.c b/src/target/x86_32_common.c index 3a26f71..fee8786 100644 --- a/src/target/x86_32_common.c +++ b/src/target/x86_32_common.c @@ -853,7 +853,8 @@ int x86_32_common_remove_watchpoint(struct target *t, struct watchpoint *wp) int x86_32_common_add_breakpoint(struct target *t, struct breakpoint *bp) { - LOG_DEBUG("type=%d, addr=0x%08" PRIx32, bp->type, bp->address); + LOG_DEBUG("type=%d, addr=0x%08" PRIx32, + bp->type, (uint32_t)bp->address); if (check_not_halted(t)) return ERROR_TARGET_NOT_HALTED; /* set_breakpoint() will return ERROR_TARGET_RESOURCE_NOT_AVAILABLE if all @@ -864,7 +865,8 @@ int x86_32_common_add_breakpoint(struct target *t, struct breakpoint *bp) int x86_32_common_remove_breakpoint(struct target *t, struct breakpoint *bp) { - LOG_DEBUG("type=%d, addr=0x%08" PRIx32, bp->type, bp->address); + LOG_DEBUG("type=%d, addr=0x%08" PRIx32, + bp->type, (uint32_t)bp->address); if (check_not_halted(t)) return ERROR_TARGET_NOT_HALTED; if (bp->set) @@ -1005,7 +1007,7 @@ static int unset_hwbp(struct target *t, struct breakpoint *bp) debug_reg_list[hwbp_num].bp_value = 0; LOG_USER("%s hardware breakpoint %" PRIu32 " removed from 0x%08" PRIx32 " (hwreg=%d)", - __func__, bp->unique_id, bp->address, hwbp_num); + __func__, bp->unique_id, (uint32_t)bp->address, hwbp_num); return ERROR_OK; } @@ -1034,7 +1036,7 @@ static int set_swbp(struct target *t, struct breakpoint *bp) if (readback != SW_BP_OPCODE) { LOG_ERROR("%s software breakpoint error at 0x%08" PRIx32 ", check memory", - __func__, bp->address); + __func__, (uint32_t)bp->address); LOG_ERROR("%s readback=0x%02" PRIx8 " orig=0x%02" PRIx8 "", __func__, readback, *bp->orig_instr); return ERROR_FAIL; @@ -1061,7 +1063,7 @@ static int set_swbp(struct target *t, struct breakpoint *bp) addto->next = new_patch; } LOG_USER("%s software breakpoint %" PRIu32 " set at 0x%08" PRIx32, - __func__, bp->unique_id, bp->address); + __func__, bp->unique_id, (uint32_t)bp->address); return ERROR_OK; } @@ -1083,7 +1085,7 @@ static int unset_swbp(struct target *t, struct breakpoint *bp) return ERROR_FAIL; } else { LOG_ERROR("%s software breakpoint remove error at 0x%08" PRIx32 ", check memory", - __func__, bp->address); + __func__, (uint32_t)bp->address); LOG_ERROR("%s current=0x%02" PRIx8 " orig=0x%02" PRIx8 "", __func__, current_instr, *bp->orig_instr); return ERROR_FAIL; @@ -1109,7 +1111,7 @@ static int unset_swbp(struct target *t, struct breakpoint *bp) } LOG_USER("%s software breakpoint %" PRIu32 " removed from 0x%08" PRIx32, - __func__, bp->unique_id, bp->address); + __func__, bp->unique_id, (uint32_t)bp->address); return ERROR_OK; } @@ -1117,7 +1119,8 @@ static int set_breakpoint(struct target *t, struct breakpoint *bp) { int error = ERROR_OK; struct x86_32_common *x86_32 = target_to_x86_32(t); - LOG_DEBUG("type=%d, addr=0x%08" PRIx32, bp->type, bp->address); + LOG_DEBUG("type=%d, addr=0x%08" PRIx32, + bp->type, (uint32_t)bp->address); if (bp->set) { LOG_ERROR("breakpoint already set"); return error; @@ -1126,7 +1129,7 @@ static int set_breakpoint(struct target *t, struct breakpoint *bp) error = set_hwbp(t, bp); if (error != ERROR_OK) { LOG_ERROR("%s error setting hardware breakpoint at 0x%08" PRIx32, - __func__, bp->address); + __func__, (uint32_t)bp->address); return error; } } else { @@ -1134,7 +1137,7 @@ static int set_breakpoint(struct target *t, struct breakpoint *bp) error = set_swbp(t, bp); if (error != ERROR_OK) { LOG_ERROR("%s error setting software breakpoint at 0x%08" PRIx32, - __func__, bp->address); + __func__, (uint32_t)bp->address); return error; } } else { @@ -1148,7 +1151,8 @@ static int set_breakpoint(struct target *t, struct breakpoint *bp) static int unset_breakpoint(struct target *t, struct breakpoint *bp) { - LOG_DEBUG("type=%d, addr=0x%08" PRIx32, bp->type, bp->address); + LOG_DEBUG("type=%d, addr=0x%08" PRIx32, + bp->type, (uint32_t)bp->address); if (!bp->set) { LOG_WARNING("breakpoint not set"); return ERROR_OK; @@ -1157,13 +1161,13 @@ static int unset_breakpoint(struct target *t, struct breakpoint *bp) if (bp->type == BKPT_HARD) { if (unset_hwbp(t, bp) != ERROR_OK) { LOG_ERROR("%s error removing hardware breakpoint at 0x%08" PRIx32, - __func__, bp->address); + __func__, (uint32_t)bp->address); return ERROR_FAIL; } } else { if (unset_swbp(t, bp) != ERROR_OK) { LOG_ERROR("%s error removing software breakpoint at 0x%08" PRIx32, - __func__, bp->address); + __func__, (uint32_t)bp->address); return ERROR_FAIL; } } @@ -1176,7 +1180,8 @@ static int set_watchpoint(struct target *t, struct watchpoint *wp) struct x86_32_common *x86_32 = target_to_x86_32(t); struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list; int wp_num = 0; - LOG_DEBUG("type=%d, addr=0x%08" PRIx32, wp->rw, wp->address); + LOG_DEBUG("type=%d, addr=0x%08" PRIx32, + wp->rw, (uint32_t)wp->address); if (wp->set) { LOG_ERROR("%s watchpoint already set", __func__); @@ -1224,7 +1229,8 @@ static int set_watchpoint(struct target *t, struct watchpoint *wp) LOG_USER("'%s' watchpoint %d set at 0x%08" PRIx32 " with length %" PRIu32 " (hwreg=%d)", wp->rw == WPT_READ ? "read" : wp->rw == WPT_WRITE ? "write" : wp->rw == WPT_ACCESS ? "access" : "?", - wp->unique_id, wp->address, wp->length, wp_num); + wp->unique_id, (uint32_t)wp->address, wp->length, + wp_num); return ERROR_OK; } @@ -1232,7 +1238,8 @@ static int unset_watchpoint(struct target *t, struct watchpoint *wp) { struct x86_32_common *x86_32 = target_to_x86_32(t); struct x86_32_dbg_reg *debug_reg_list = x86_32->hw_break_list; - LOG_DEBUG("type=%d, addr=0x%08" PRIx32, wp->rw, wp->address); + LOG_DEBUG("type=%d, addr=0x%08" PRIx32, + wp->rw, (uint32_t)wp->address); if (!wp->set) { LOG_WARNING("watchpoint not set"); return ERROR_OK; @@ -1253,7 +1260,8 @@ static int unset_watchpoint(struct target *t, struct watchpoint *wp) LOG_USER("'%s' watchpoint %d removed from 0x%08" PRIx32 " with length %" PRIu32 " (hwreg=%d)", wp->rw == WPT_READ ? "read" : wp->rw == WPT_WRITE ? "write" : wp->rw == WPT_ACCESS ? "access" : "?", - wp->unique_id, wp->address, wp->length, wp_num); + wp->unique_id, (uint32_t)wp->address, wp->length, + wp_num); return ERROR_OK; } diff --git a/src/target/xscale.c b/src/target/xscale.c index 82e4160..cc2c799 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -1167,7 +1167,8 @@ static int xscale_resume(struct target *target, int current, enum trace_mode saved_trace_mode; /* there's a breakpoint at the current PC, we have to step over it */ - LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address); + LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", + (uint32_t)breakpoint->address); xscale_unset_breakpoint(target, breakpoint); /* calculate PC of next instruction */ @@ -1224,7 +1225,8 @@ static int xscale_resume(struct target *target, int current, LOG_DEBUG("disable single-step"); xscale_disable_single_step(target); - LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address); + LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", + (uint32_t)breakpoint->address); xscale_set_breakpoint(target, breakpoint); } } -- ------------------------------------------------------------------------------ Site24x7 APM Insight: Get Deep Visibility into Application Performance APM + Mobile APM + RUM: Monitor 3 App instances at just $35/Month Monitor end-to-end web transactions and take corrective actions now Troubleshoot faster and improve end-user experience. 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