This is an automated email from Gerrit.

Alamy Liu ([email protected]) just uploaded a new patch set to Gerrit, which 
you can find at http://openocd.zylin.com/3319

-- gerrit

commit 3bc7d45953f9141329e8577d7a1c7b41b5c4d235
Author: Alamy Liu <[email protected]>
Date:   Fri Oct 23 09:48:45 2015 -0700

    armv8: Determine core_state (AArch64/AArch32)
    
    Change-Id: I3c50242d84ec6c475e3a2470d8a5d4e7e1ea6ba5
    Signed-off-by: Alamy Liu <[email protected]>

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 92333af..9d45fe0 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -1156,9 +1156,6 @@ static int aarch64_debug_entry(struct target *target)
 
        retval = arm_dpm_read_current_registers_64(&armv8->dpm);
 
-       /* Alamy: Is it good to be here ? */
-       target->is_aarch64 = (armv8->arm.core_state == ARM_STATE_AARCH64);
-
        if (armv8->post_debug_entry) {
                retval = armv8->post_debug_entry(target);
                if (retval != ERROR_OK)
@@ -1173,9 +1170,21 @@ static int aarch64_post_debug_entry(struct target 
*target)
        struct aarch64_common *aarch64 = target_to_aarch64(target);
        struct armv8_common *armv8 = &aarch64->armv8_common;
        struct armv8_mmu_common *armv8_mmu = &armv8->armv8_mmu;
+       uint64_t pstate;
        uint32_t sctlr_el1 = 0;
        int retval;
 
+       /* PSTATE.nRW: 0) AArch64, 1) AArch32 */
+       struct reg *reg = armv8_get_reg_by_num(&(armv8->arm), AARCH64_PSTATE);
+       pstate = buf_get_u64(reg->value, 0, 64);
+       armv8->arm.core_state = (pstate & ARMV8_PSTATE_nRW)
+               ? ARM_STATE_AARCH32
+               : ARM_STATE_AARCH64;
+
+       /* Alamy: Get rid of 'is_aarch64' */
+       target->is_aarch64 = (armv8->arm.core_state == ARM_STATE_AARCH64);
+
+
        mem_ap_sel_write_atomic_u32(armv8->arm.dap, armv8->debug_ap,
                                    armv8->debug_base + CPUDBG_DRCR, 1<<2);
        retval = aarch64_instr_read_data_r0(armv8->arm.dpm,
diff --git a/src/target/arm.h b/src/target/arm.h
index 021ced3..ef272eb 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -76,6 +76,7 @@ bool is_arm_mode(unsigned psr_mode);
 /** The PSR "T" and "J" bits define the mode of "classic ARM" cores. */
 enum arm_state {
        ARM_STATE_ARM,
+       ARM_STATE_AARCH32 = ARM_STATE_ARM,
        ARM_STATE_THUMB,
        ARM_STATE_JAZELLE,
        ARM_STATE_THUMB_EE,

-- 

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