This is an automated email from Gerrit.

Alamy Liu ([email protected]) just uploaded a new patch set to Gerrit, which 
you can find at http://openocd.zylin.com/3322

-- gerrit

commit 69e702221fe7335ca45bb7f454b83f09aa9cf4c2
Author: Alamy Liu <[email protected]>
Date:   Wed Nov 18 11:29:52 2015 -0800

    armv8: Remove 'is_armv7r' field
    
    Change-Id: I4c19394cc7ae7e8aa3861d0dd12b64692a6433d9
    Signed-off-by: Alamy Liu <[email protected]>

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 21d37ec..e2cbd8c 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -2045,11 +2045,9 @@ static int aarch64_read_memory(struct target *target, 
uint64_t address,
 
        /* determine if MMU was enabled on target stop */
        /* Alamy: Error */
-//     if (!armv8->is_armv7r) {
-               retval = aarch64_mmu(target, &mmu_enabled);
-               if (retval != ERROR_OK)
-                       return retval;
-//     }
+       retval = aarch64_mmu(target, &mmu_enabled);
+       if (retval != ERROR_OK)
+               return retval;
 
        if (armv8->memory_ap_available && (apsel == armv8->memory_ap)) {
                if (mmu_enabled) {
@@ -2103,11 +2101,9 @@ static int aarch64_write_phys_memory(struct target 
*target,
                } else {
 
                        /* write memory through APB-AP */
-//                     if (!armv8->is_armv7r) {
-                               retval = aarch64_mmu_modify(target, 0);
-                               if (retval != ERROR_OK)
-                                       return retval;
-//                     }
+                       retval = aarch64_mmu_modify(target, 0);
+                       if (retval != ERROR_OK)
+                               return retval;
                        return aarch64_write_apb_ab_memory(target, address, 
size, count, buffer);
                }
        }
@@ -2186,12 +2182,9 @@ static int aarch64_write_memory(struct target *target, 
uint64_t address,
                  "; count %" PRId32, address, size, count);
 
        /* determine if MMU was enabled on target stop */
-       /* Alamy: Error detection */
-//     if (!armv8->is_armv7r) {
-               retval = aarch64_mmu(target, &mmu_enabled);
-               if (retval != ERROR_OK)
-                       return retval;
-//     }
+       retval = aarch64_mmu(target, &mmu_enabled);
+       if (retval != ERROR_OK)
+               return retval;
 
        if (armv8->memory_ap_available && (apsel == armv8->memory_ap)) {
                LOG_DEBUG("Writing memory to address 0x%.16" PRIX64 "; size %"
@@ -2534,7 +2527,6 @@ static int aarch64_target_create(struct target *target, 
Jim_Interp *interp)
 {
        struct aarch64_common *aarch64 = calloc(1, sizeof(struct 
aarch64_common));
 
-//     aarch64->armv8_common.is_armv7r = false;
 
        return aarch64_init_arch_info(target, aarch64, target->tap);
 }
diff --git a/src/target/armv8.h b/src/target/armv8.h
index ccd11b4..0ac294b 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -529,7 +529,6 @@ struct armv8_common {
        uint8_t multi_processor_system;
        uint8_t cluster_id;
        uint8_t cpu_id;
-       bool is_armv7r;
 
        /* cache specific to V7 Memory Management Unit compatible with v4_5*/
        struct armv8_mmu_common armv8_mmu;

-- 

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