Hi,

On Saturday 23 April 2016 17:22:38 Uwe Bonnes wrote:
> Hello,
> 
> http://www.keil.com/support/docs/3778.htm
> 
> describes a nasty behaviour when single stepping with Cortex-M7 up to r0p1.
> 
> It there anything OpenOCD can do to work around that bug?

Going by the description of the bug, resolution and status, certainly some 
out-of-the-box thinking would be required. It says:

> Unfortunately the problem can't be eliminated by the debugger. So, if you
> want to debug a specific portion of the program code, it can help to
> instrument the code like disabling problematic recurring interrupts
> manually for an undisturbed debug experience.

and

> we made an attempt to workaround the issue in our ULINK2, ULINKpro and
> CMSIS_DAP debug drivers by setting the DHCSR -> C_MASKINTS bit while the
> target is halted and not just for a step. However, this does not solve the
> issue in all situations. When a program halts at a breakpoint, an interrupt
> can become pending until the debugger can set the C_MASKINTS bit. That
> interrupt also gets entered on the next step.

So it looks like the core latches the interrupt exception even when in debug 
mode and nothing the debugger does can prevent it from executing it when it 
exits debug mode. I could have imagined a way to just trap entering the 
interrupt exception and disabling stepping until the state is left, but I 
believe that the M7 cannot trap interrupt _exit_, only entry. So, what we can 
do is only the partial fix Keil attempted to do, which is setting C_MASKINTS 
on entering debug state, not just before a step. It will improve the 
situation, but not reliably, which makes it rather useless.

A typical offender would be a ticker interrupt. Some hardware has the 
possibility to halt timer counting on entering debug state. This would prevent 
the ticker timer from latching an interrupt while the core is halted, but 
needs to be solved at board or chip level in a config file.

BR,
Matthias

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