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Venant DeSouza ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/3514

-- gerrit

commit ab089c8d704a1d2f4b61dbb1a1a1a86dfaab493f
Author: Venant DeSouza <[email protected]>
Date:   Thu Jun 2 15:32:08 2016 -0700

    topic: ID for 64 pin SAM4SD32(sam4sd32b)
    
    The project HW is using a SAM4SD32B, which is the 64 pin version
    of a SAM4SD32C (100 pin). I based the 32B on the 32C description.
    
    Signed-off-by: Venant DeSouza <[email protected]>
    Change-Id: Ibff78dc49ec7a307030f2770fa09c03d8f737ff7

diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 8431729..1e7f64c 100644
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -728,6 +728,50 @@ static const struct sam4_chip_details all_sam4_details[] = 
{
                },
        },
 
+       /*at91sam4sd32b - LQFFP64/BGA64*/
+       {
+         .chipid_cidr    = 0x29970ee0,
+         .name           = "at91sam4sd32b",
+         .total_flash_size     = 2048 * 1024,
+         .total_sram_size      = 160 * 1024,
+         .n_gpnvms       = 3,
+         .n_banks        = 2,
+
+/*    .bank[0] = { */
+    {
+      {
+        .probed = 0,
+        .pChip  = NULL,
+        .pBank  = NULL,
+        .bank_number = 0,
+        .base_address = FLASH_BANK0_BASE_SD,
+        .controller_address = 0x400e0a00,
+        .flash_wait_states = 6, /* workaround silicon bug */
+        .present = 1,
+        .size_bytes =  1024 * 1024,
+        .nsectors   =  128,
+        .sector_size = 8192,
+        .page_size   = 512,
+      },
+
+/*    .bank[1] = { */
+      {
+        .probed = 0,
+        .pChip  = NULL,
+        .pBank  = NULL,
+        .bank_number = 1,
+        .base_address = FLASH_BANK1_BASE_2048K_SD,
+        .controller_address = 0x400e0c00,
+        .flash_wait_states = 6, /* workaround silicon bug */
+        .present = 1,
+        .size_bytes =  1024 * 1024,
+        .nsectors   =  128,
+        .sector_size = 8192,
+        .page_size   = 512,
+      },
+    },
+  },
+
        /*at91sam4sd32c*/
        {
                .chipid_cidr    = 0x29a70ee0,

-- 

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