This is an automated email from Gerrit.
Matthias Welwarsky (matth...@welwarsky.de) just uploaded a new patch set to
Gerrit, which you can find at http://openocd.zylin.com/3748
-- gerrit
commit e6dd05040540732c322a58cd7ccd5522ac70ab56
Author: Matthias Welwarsky <matthias.welwar...@sysgo.com>
Date: Fri Sep 16 11:06:42 2016 +0200
aarch64: fix error recovery in aarch64_dpm_prepare
Flush DTRRX with a dummy read if it's full, clear sticky errors
by writing CSE bit to EDRCR register.
Change-Id: Ia42ae9d3859ba6cbe892d48584e21acdd4e25c84
Signed-off-by: Matthias Welwarsky <matthias.welwar...@sysgo.com>
diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 71210a4..29beb4a 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -360,10 +360,14 @@ static int aarch64_dpm_prepare(struct arm_dpm *dpm)
if (dscr & DSCR_DTR_RX_FULL) {
LOG_ERROR("DSCR_DTR_RX_FULL, dscr 0x%08" PRIx32, dscr);
/* Clear DCCRX */
- retval = aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- 0xd5130400,
- &dscr);
+ retval = mem_ap_read_u32(a8->armv8_common.debug_ap,
+ a8->armv8_common.debug_base + CPUV8_DBG_DTRRX, &dscr);
+ if (retval != ERROR_OK)
+ return retval;
+
+ /* Clear sticky error */
+ retval = mem_ap_write_u32(a8->armv8_common.debug_ap,
+ a8->armv8_common.debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
if (retval != ERROR_OK)
return retval;
}
--
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