This is an automated email from Gerrit.

Matthias Welwarsky (matth...@welwarsky.de) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/3767

-- gerrit

commit 2564e8794511c0c0309d020a0fe95d48b42f3bf4
Author: Matthias Welwarsky <matthias.welwar...@sysgo.com>
Date:   Fri Sep 16 10:12:00 2016 +0200

    aarch64: fix register list
    
    According to gdb documentation, a register "cpsr" is expected if
    aarch64 features are announced. Also, the value buffer must be
    capable of holding a 64bit value (8 byte, not 4)
    
    Change-Id: I7aec4e84fa87eadb26797acd0d16c988b9852616
    Signed-off-by: Matthias Welwarsky <matthias.welwar...@sysgo.com>

diff --git a/src/target/armv8.c b/src/target/armv8.c
index db840f4..1348843 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -826,7 +826,7 @@ static const struct {
        { ARMV8_R31, "sp", 64, REG_TYPE_DATA_PTR, "general", 
"org.gnu.gdb.aarch64.core" },
        { ARMV8_PC,  "pc", 64, REG_TYPE_CODE_PTR, "general", 
"org.gnu.gdb.aarch64.core" },
 
-       { ARMV8_xPSR, "CPSR", 64, REG_TYPE_INT, "general", 
"org.gnu.gdb.aarch64.core" },
+       { ARMV8_xPSR, "CPSR", 32, REG_TYPE_INT, "general", 
"org.gnu.gdb.aarch64.core" },
 };
 
 #define ARMV8_NUM_REGS ARRAY_SIZE(armv8_regs)
@@ -901,7 +901,7 @@ struct reg_cache *armv8_build_reg_cache(struct target 
*target)
 
                reg_list[i].name = armv8_regs[i].name;
                reg_list[i].size = armv8_regs[i].bits;
-               reg_list[i].value = calloc(1, 4);
+               reg_list[i].value = calloc(1, 8);
                reg_list[i].dirty = 0;
                reg_list[i].valid = 0;
                reg_list[i].type = &armv8_reg_type;

-- 

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