ST decided to map flash_size_reg to 0x1FF07A22 for the F72x/73x instead of 0x1FF0F442 as for the other current F7 variants, at least RM0431 claims that. The message below > Warn : STM32 flash size failed, probe inaccurate - assuming 512k flash supports that. As soon I get hands on a f723-disco, I'll check that. Maybe due to completely different flash organization, the 72x/73x have a 128-bit, whereas 74x/75x and 76x/77x a 265-bit wide flash bus.
On 2017-03-01 08:50, Michael Jakob wrote: > Hello all, > > > > I’m working with an STM Nucleo STM32F722 board for debugging with Eclipse and > Windows. This > board is just available since a few days. I got the following output: > > GNU ARM Eclipse 64-bits Open On-Chip Debugger 0.10.0-00113-g0f83948 > (2017-01-24-18:48) > > Licensed under GNU GPL v2 > > For bug reports, read > > http://openocd.org/doc/doxygen/bugs.html > > Info : The selected transport took over low-level target control. The results > might differ > compared to plain JTAG/SWD > > adapter speed: 2000 kHz > > adapter_nsrst_delay: 100 > > srst_only separate srst_nogate srst_open_drain connect_deassert_srst > > srst_only separate srst_nogate srst_open_drain connect_deassert_srst > > Started by GNU ARM Eclipse > > Info : Unable to match requested speed 2000 kHz, using 1800 kHz > > Info : Unable to match requested speed 2000 kHz, using 1800 kHz > > Info : clock speed 1800 kHz > > Info : STLINK v2 JTAG v28 API v2 SWIM v18 VID 0x0483 PID 0x374B > > Info : using stlink api v2 > > Info : Target voltage: 3.247244 > > Info : stm32f7x.cpu: hardware has 8 breakpoints, 4 watchpoints > > Info : accepting 'gdb' connection on tcp/3333 > > Info : device id = 0x10006452 > > Warn : Cannot identify target as a STM32 family. > > Error: auto_probe failed > > Error: Connect failed. Consider setting up a gdb-attach event for the target > to prepare target > for GDB connect, or use 'gdb_memory_map disable'. > > Error: attempted 'gdb' connection rejected > > > > I have added the following to src/flash/nor/ stm32f2x.c file. > > https://sourceforge.net/p/openocd/code/ci/master/tree/src/flash/nor/stm32f2x.c > <https://github.com/gnuarmeclipse/openocd/blob/gnuarmeclipse-dev/src/flash/nor/stm32f2x.c#L66> > > Line 66: > > * STM32F7[2|3] > > * 512 KByte part with 4 x 16, 1 x 64, 3 x 128. > > * > > > > Line 895: > > case 0x452: /* F72x/73x */ > > max_flash_size_in_kb = 512; > > max_sector_size_in_kb = 128; > > flash_size_reg = 0x1FF0F442; //not sure for this one, but likely > the same as other > F7 ??? > > stm32x_info->has_extra_options = true; > > stm32x_info->has_boot_addr = true; > > break; > > > > Line 1137 > > case 0x452: > > device_str = "STM32F7[2|3]x"; > > switch (rev_id) { > > case 0x1000: > > rev_str = "A"; > > break; > > } > > break; > > > > This changes make OpenOCD work and below you can see the related output. I > compiled with MSYS2 > on windows. > > > > Open On-Chip Debugger 0.10.0+dev-00092-g77189db-dirty (2017-02-28-02:01) > > Licensed under GNU GPL v2 > > For bug reports, read > > http://openocd.org/doc/doxygen/bugs.html > > Info : The selected transport took over low-level target control. The results > might differ > compared to plain JTAG/SWD > > adapter speed: 2000 kHz > > adapter_nsrst_delay: 100 > > srst_only separate srst_nogate srst_open_drain connect_deassert_srst > > srst_only separate srst_nogate srst_open_drain connect_deassert_srst > > Started by GNU ARM Eclipse > > Info : Unable to match requested speed 2000 kHz, using 1800 kHz > > Info : Unable to match requested speed 2000 kHz, using 1800 kHz > > Info : clock speed 1800 kHz > > Info : STLINK v2 JTAG v28 API v2 SWIM v18 VID 0x0483 PID 0x374B > > Info : using stlink api v2 > > Info : Target voltage: 3.250394 > > Info : stm32f7x.cpu: hardware has 8 breakpoints, 4 watchpoints > > Info : accepting 'gdb' connection on tcp/3333 > > Info : device id = 0x10006452 > > Warn : STM32 flash size failed, probe inaccurate - assuming 512k flash > > Info : flash size = 512kbytes > > target halted due to debug-request, current mode: Thread > > xPSR: 0x01000000 pc: 0x08008a3c msp: 0x20010000 > > semihosting is enabled > > target halted due to debug-request, current mode: Thread > > xPSR: 0x01000000 pc: 0x08008a3c msp: 0x20010000, semihosting > > target halted due to debug-request, current mode: Thread > > xPSR: 0x01000000 pc: 0xfffffffe msp: 0xfffffffc, semihosting > > Info : Padding image section 0 with 20648 bytes > > target halted due to breakpoint, current mode: Thread > > xPSR: 0x61000000 pc: 0x20000046 msp: 0xfffffffc, semihosting > > Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet > not sent! (7298). > Workaround: increase "set remotetimeout" in GDB > > target halted due to debug-request, current mode: Thread > > xPSR: 0x01000000 pc: 0x08008a3c msp: 0x20010000, semihosting > > target halted due to debug-request, current mode: Thread > > xPSR: 0x01000000 pc: 0x08008a3c msp: 0x20010000, semihosting > > ===== arm v7m registers > > (0) r0 (/32): 0x00000000 > > (1) r1 (/32): 0x00000000 > > (2) r2 (/32): 0x00000000 > > (3) r3 (/32): 0x00000000 > > (4) r4 (/32): 0x00000000 > > (5) r5 (/32): 0x00000000 > > (6) r6 (/32): 0x00000000 > > (7) r7 (/32): 0x00000000 > > (8) r8 (/32): 0x00000000 > > (9) r9 (/32): 0x00000000 > > (10) r10 (/32): 0x00000000 > > (11) r11 (/32): 0x00000000 > > (12) r12 (/32): 0x00000000 > > (13) sp (/32): 0x20010000 > > (14) lr (/32): 0xFFFFFFFF > > (15) pc (/32): 0x08008A3C > > (16) xPSR (/32): 0x01000000 > > (17) msp (/32): 0x20010000 > > (18) psp (/32): 0x00000000 > > (19) primask (/1): 0x00 > > (20) basepri (/8): 0x00 > > (21) faultmask (/1): 0x00 > > (22) control (/2): 0x00 > > (23) d0 (/64): 0x0000000000000000 > > (24) d1 (/64): 0x0000000000000000 > > (25) d2 (/64): 0x0000000000000000 > > (26) d3 (/64): 0x0000000000000000 > > (27) d4 (/64): 0x0000000000000000 > > (28) d5 (/64): 0x0000000000000000 > > (29) d6 (/64): 0x0000000000000000 > > (30) d7 (/64): 0xFFFFFFFF00000000 > > (31) d8 (/64): 0x0000000000000000 > > (32) d9 (/64): 0x0000000000000000 > > (33) d10 (/64): 0x0000000000000000 > > (34) d11 (/64): 0x0000000000000000 > > (35) d12 (/64): 0x0000000000000000 > > (36) d13 (/64): 0x0000000000000000 > > (37) d14 (/64): 0x0000000000000000 > > (38) d15 (/64): 0xFFFFFFFF00000000 > > (39) fpscr (/32): 0x00000000 > > ===== Cortex-M DWT registers > > (40) dwt_ctrl (/32) > > (41) dwt_cyccnt (/32) > > (42) dwt_0_comp (/32) > > (43) dwt_0_mask (/4) > > (44) dwt_0_function (/32) > > (45) dwt_1_comp (/32) > > (46) dwt_1_mask (/4) > > (47) dwt_1_function (/32) > > (48) dwt_2_comp (/32) > > (49) dwt_2_mask (/4) > > (50) dwt_2_function (/32) > > (51) dwt_3_comp (/32) > > (52) dwt_3_mask (/4) > > (53) dwt_3_function (/32) > > > > Would be nice if this updates will go into the next release. Thanks. > > > > ------------------------------------------------------------------------------ > Check out the vibrant tech community on one of the world's most > engaging tech sites, SlashDot.org! http://sdm.link/slashdot > > > > _______________________________________________ > OpenOCD-devel mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/openocd-devel >
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