Hi Leonardo,
I quickly tested almost identical config a STM32F103 with CMSIS-DAP. I
was not able to replicate
the problem with halting CPU after connect_assert_srst, CPU stops as
expected.
On 02.04.2017 17:48, Leonardo Sabino dos Santos wrote:
> Looking at the NRST line with a scope while OpenOCD starts, without
> connect_assert_srst I see 3 reset pulses of ~60ms; with
> connect_assert_srst I see a single pulse of ~11 ms.
It is strange. There should be only one reset pulse.
> * Full -d3 log [Split because of msg. size, part 1 of 2]:
Log looks good except the CPU does not halt.
Could you add
$_TARGETNAME configure -event reset-assert-post { mdw 0xe000edfc }
to your cfg and test again? I suspect write to DEMCR is not effective in
time of SRST deasserting, some
extra SWCLK pulses may solve it. No idea why the problem appears only
with connect_assert_srst.
Tomas
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