This is an automated email from Gerrit.

Matthias Welwarsky ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/4325

-- gerrit

commit 7802f4c2cf2a4c2b20be423f73d6e030cf8843fe
Author: Matthias Welwarsky <[email protected]>
Date:   Wed Jan 10 15:00:54 2018 +0100

    arm_adi_v5: fix mem_ap_read/write noincr mode
    
    this fixes TAR clobbering introduced by
    changeset 4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f
    
    Change-Id: I26556fd5e117d3332ffcec386d08667b9446cd96
    Signed-off-by: Matthias Welwarsky <[email protected]>

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index ae6c2c6..ef30c2f 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -318,14 +318,14 @@ int mem_ap_write_atomic_u32(struct adiv5_ap *ap, uint32_t 
address,
  * @return ERROR_OK on success, otherwise an error code.
  */
 static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t 
size, uint32_t count,
-               uint32_t address, bool addrinc)
+               uint32_t addr, bool addrinc)
 {
        struct adiv5_dap *dap = ap->dap;
        size_t nbytes = size * count;
        const uint32_t csw_addrincr = addrinc ? CSW_ADDRINC_SINGLE : 
CSW_ADDRINC_OFF;
        uint32_t csw_size;
        uint32_t addr_xor;
-       int retval;
+       int retval = ERROR_OK;
 
        /* TI BE-32 Quirks mode:
         * Writes on big-endian TMS570 behave very strangely. Observed behavior:
@@ -353,11 +353,12 @@ static int mem_ap_write(struct adiv5_ap *ap, const 
uint8_t *buffer, uint32_t siz
                return ERROR_TARGET_UNALIGNED_ACCESS;
        }
 
-       if (ap->unaligned_access_bad && (address % size != 0))
+       if (ap->unaligned_access_bad && (addr % size != 0))
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
        while (nbytes > 0) {
                uint32_t this_size = size;
+               uint32_t address = addr;
 
                /* Select packed transfer if possible */
                if (addrinc && ap->packed_transfers && nbytes >= 4
@@ -415,6 +416,9 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t 
*buffer, uint32_t siz
                        break;
 
                mem_ap_update_tar_cache(ap);
+
+               if (addrinc)
+                       addr = address;
        }
 
        /* REVISIT: Might want to have a queued version of this function that 
does not run. */
@@ -452,7 +456,7 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t 
*buffer, uint32_t size, uint
        const uint32_t csw_addrincr = addrinc ? CSW_ADDRINC_SINGLE : 
CSW_ADDRINC_OFF;
        uint32_t csw_size;
        uint32_t address = adr;
-       int retval;
+       int retval = ERROR_OK;
 
        /* TI BE-32 Quirks mode:
         * Reads on big-endian TMS570 behave strangely differently than writes.
@@ -509,7 +513,9 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t 
*buffer, uint32_t size, uint
                        break;
 
                nbytes -= this_size;
-               address += this_size;
+
+               if (addrinc)
+                       address += this_size;
 
                mem_ap_update_tar_cache(ap);
        }

-- 

------------------------------------------------------------------------------
Check out the vibrant tech community on one of the world's most
engaging tech sites, Slashdot.org! http://sdm.link/slashdot
_______________________________________________
OpenOCD-devel mailing list
[email protected]
https://lists.sourceforge.net/lists/listinfo/openocd-devel

Reply via email to