This is an automated email from Gerrit.
Matthias Welwarsky (matth...@welwarsky.de) just uploaded a new patch set to
Gerrit, which you can find at http://openocd.zylin.com/4479
-- gerrit
commit 5125ca562e796f71c82276ec8ed9f944154cf4d6
Author: Matthias Welwarsky <matthias.welwar...@sysgo.com>
Date: Thu Apr 5 13:42:21 2018 +0200
armv8: allow halt on exception
add command 'catch_exc' to halt a core on entering any of Secure EL1 or
EL3 or Non-Secure EL1 or EL2.
Change-Id: I0c68e247af68dd96616855a9bc1063c277d222e5
Signed-off-by: Matthias Welwarsky <matthias.welwar...@sysgo.com>
diff --git a/src/target/armv8.c b/src/target/armv8.c
index 82b2b24..e428ae9 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -1000,6 +1000,76 @@ int armv8_mmu_translate_va_pa(struct target *target,
target_addr_t va,
return retval;
}
+COMMAND_HANDLER(armv8_handle_exception_catch_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ struct armv8_common *armv8 = target_to_armv8(target);
+ uint32_t edeccr = 0;
+ unsigned int argp = 0;
+ int retval;
+
+ static const Jim_Nvp nvp_ecatch_modes[] = {
+ { .name = "off", .value = 0 },
+ { .name = "nsec_el1", .value = (1 << 5) },
+ { .name = "nsec_el2", .value = (2 << 5) },
+ { .name = "nsec_el12", .value = (3 << 5) },
+ { .name = "sec_el1", .value = (1 << 1) },
+ { .name = "sec_el3", .value = (4 << 1) },
+ { .name = "sec_el13", .value = (5 << 1) },
+ { .name = NULL, .value = -1 },
+ };
+ const Jim_Nvp *n;
+
+ if (CMD_ARGC == 0) {
+ const char *sec, *nsec;
+
+ retval = mem_ap_read_atomic_u32(armv8->debug_ap,
+ armv8->debug_base + CPUV8_DBG_ECCR,
&edeccr);
+ if (retval != ERROR_OK)
+ return retval;
+
+ n = Jim_Nvp_value2name_simple(nvp_ecatch_modes, edeccr & 0x0f);
+ if (n->name == NULL)
+ return ERROR_FAIL;
+
+ sec = n->name;
+
+ n = Jim_Nvp_value2name_simple(nvp_ecatch_modes, edeccr & 0xf0);
+ if (n->name == NULL)
+ return ERROR_FAIL;
+
+ nsec = n->name;
+
+ command_print(CMD_CTX, "Exception Catch: Secure: %s,
Non-Secure: %s", sec, nsec);
+ return ERROR_OK;
+ }
+
+ if (CMD_ARGC > 2) {
+ LOG_ERROR("Too many options (>2)");
+ return ERROR_FAIL;
+ }
+
+ while (CMD_ARGC > argp) {
+ n = Jim_Nvp_name2value_simple(nvp_ecatch_modes, CMD_ARGV[argp]);
+ if (n->name == NULL) {
+ LOG_ERROR("Unknown option: %s", CMD_ARGV[argp]);
+ return ERROR_FAIL;
+ }
+
+ LOG_DEBUG("found: %s", n->name);
+
+ edeccr |= n->value;
+ argp++;
+ }
+
+ retval = mem_ap_write_atomic_u32(armv8->debug_ap,
+ armv8->debug_base + CPUV8_DBG_ECCR, edeccr);
+ if (retval != ERROR_OK)
+ return retval;
+
+ return ERROR_OK;
+}
+
int armv8_handle_cache_info_command(struct command_context *cmd_ctx,
struct armv8_cache_common *armv8_cache)
{
@@ -1013,6 +1083,7 @@ int armv8_handle_cache_info_command(struct
command_context *cmd_ctx,
return ERROR_OK;
}
+
int armv8_init_arch_info(struct target *target, struct armv8_common *armv8)
{
struct arm *arm = &armv8->arm;
@@ -1643,6 +1714,13 @@ void armv8_free_reg_cache(struct target *target)
}
const struct command_registration armv8_command_handlers[] = {
+ {
+ .name = "catch_exc",
+ .handler = armv8_handle_exception_catch_command,
+ .mode = COMMAND_EXEC,
+ .help = "configure exception catch",
+ .usage = "",
+ },
COMMAND_REGISTRATION_DONE
};
diff --git a/src/target/armv8.h b/src/target/armv8.h
index b346462..6b92635 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -247,6 +247,7 @@ target_to_armv8(struct target *target)
#define CPUV8_DBG_WFAR1 0x34
#define CPUV8_DBG_DSCR 0x088
#define CPUV8_DBG_DRCR 0x090
+#define CPUV8_DBG_ECCR 0x098
#define CPUV8_DBG_PRCR 0x310
#define CPUV8_DBG_PRSR 0x314
--
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