This is an automated email from Gerrit. Paul Fertser ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4526
-- gerrit commit 835f834a237affbbe4a24723e1822454164ca747 Author: Paul Fertser <[email protected]> Date: Tue May 22 12:04:31 2018 +0300 Fix warnings exposed by GCC8 gcc (GCC) 8.1.0 generates new warnings and thus fails the build. The ARM disassembler warnings actually exposed a bug in SMALW, SMULW and SMUL instructions decoding. Reported by Eimers on IRC. Change-Id: I200c70f75a9e07a1f13a592addc1c5fb37714440 Signed-off-by: Paul Fertser <[email protected]> diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index 4d665d3..86fad72 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -937,7 +937,7 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip) unsigned num_blocks; struct kinetis_flash_bank *k_bank; struct flash_bank *bank; - char base_name[80], name[80], num[4]; + char base_name[69], name[80], num[4]; char *class, *p; num_blocks = k_chip->num_pflash_blocks + k_chip->num_nvm_blocks; @@ -948,7 +948,8 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip) bank = k_chip->banks[0].bank; if (bank && bank->name) { - strncpy(base_name, bank->name, sizeof(base_name)); + strncpy(base_name, bank->name, sizeof(base_name) - 1); + base_name[sizeof(base_name) - 1] = '\0'; p = strstr(base_name, ".pflash"); if (p) { *p = '\0'; @@ -960,7 +961,8 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip) } } } else { - strncpy(base_name, target_name(k_chip->target), sizeof(base_name)); + strncpy(base_name, target_name(k_chip->target), sizeof(base_name) - 1); + base_name[sizeof(base_name) - 1] = '\0'; p = strstr(base_name, ".cpu"); if (p) *p = '\0'; @@ -2012,7 +2014,7 @@ static int kinetis_probe_chip(struct kinetis_chip *k_chip) unsigned cpu_mhz = 120; unsigned idx; bool use_nvm_marking = false; - char flash_marking[11], nvm_marking[2]; + char flash_marking[12], nvm_marking[2]; char name[40]; k_chip->probed = false; diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index e2d9b5e..d0a58bd 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -152,6 +152,8 @@ static uint32_t mem_ap_get_tar_increment(struct adiv5_ap *ap) return 2; case CSW_32BIT: return 4; + default: + return 0; } case CSW_ADDRINC_PACKED: return 4; diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 8e783d3..17948d6 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -1549,7 +1549,7 @@ static int evaluate_misc_instr(uint32_t opcode, } /* SMLAW < y> */ - if (((opcode & 0x00600000) == 0x00100000) && (x == 0)) { + if (((opcode & 0x00600000) == 0x00200000) && (x == 0)) { uint8_t Rd, Rm, Rs, Rn; instruction->type = ARM_SMLAWy; Rd = (opcode & 0xf0000) >> 16; @@ -1571,7 +1571,7 @@ static int evaluate_misc_instr(uint32_t opcode, } /* SMUL < x><y> */ - if ((opcode & 0x00600000) == 0x00300000) { + if ((opcode & 0x00600000) == 0x00600000) { uint8_t Rd, Rm, Rs; instruction->type = ARM_SMULxy; Rd = (opcode & 0xf0000) >> 16; @@ -1592,7 +1592,7 @@ static int evaluate_misc_instr(uint32_t opcode, } /* SMULW < y> */ - if (((opcode & 0x00600000) == 0x00100000) && (x == 1)) { + if (((opcode & 0x00600000) == 0x00200000) && (x == 1)) { uint8_t Rd, Rm, Rs; instruction->type = ARM_SMULWy; Rd = (opcode & 0xf0000) >> 16; -- ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
