This is an automated email from Gerrit.

Dominik Peklo ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/4575

-- gerrit

commit 0295c58e726d10405e9321ca3d7d2f0f94c6bb5a
Author: Dominik Peklo <[email protected]>
Date:   Mon Jun 25 23:30:42 2018 +1000

    tcl/target/stm32f0x: Allow overriding the Flash bank size
    
    Copy & paste from another stm32 target.
    
    Change-Id: I0f6cbcec974ce70c23c1850526354106caee1172
    Signed-off-by: Dominik Peklo <[email protected]>

diff --git a/tcl/target/stm32f0x.cfg b/tcl/target/stm32f0x.cfg
index b8c0de9..1b8d61c 100644
--- a/tcl/target/stm32f0x.cfg
+++ b/tcl/target/stm32f0x.cfg
@@ -1,15 +1,15 @@
 # script for stm32f0x family
 
 #
-# stm32 devices support SWD transports only.
+# stm32f0x devices support SWD transports only
 #
 source [find target/swj-dp.tcl]
 source [find mem_helper.tcl]
 
 if { [info exists CHIPNAME] } {
-   set _CHIPNAME $CHIPNAME
+       set _CHIPNAME $CHIPNAME
 } else {
-   set _CHIPNAME stm32f0x
+       set _CHIPNAME stm32f0x
 }
 
 set _ENDIAN little
@@ -17,18 +17,26 @@ set _ENDIAN little
 # Work-area is a space in RAM used for flash programming
 # By default use 4kB
 if { [info exists WORKAREASIZE] } {
-   set _WORKAREASIZE $WORKAREASIZE
+       set _WORKAREASIZE $WORKAREASIZE
 } else {
-   set _WORKAREASIZE 0x1000
+       set _WORKAREASIZE 0x1000
+}
+
+# Allow overriding the Flash bank size
+if { [info exists FLASH_SIZE] } {
+       set _FLASH_SIZE $FLASH_SIZE
+} else {
+       # autodetect size
+       set _FLASH_SIZE 0
 }
 
 #jtag scan chain
 if { [info exists CPUTAPID] } {
-   set _CPUTAPID $CPUTAPID
+       set _CPUTAPID $CPUTAPID
 } else {
   # See STM Document RM0091
   # Section 29.5.3
-   set _CPUTAPID 0x0bb11477
+       set _CPUTAPID 0x0bb11477
 }
 
 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 
$_CPUTAPID
@@ -41,7 +49,7 @@ $_TARGETNAME configure -work-area-phys 0x20000000 
-work-area-size $_WORKAREASIZE
 
 # flash size will be probed
 set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32f1x 0x08000000 $_FLASH_SIZE 0 0 $_TARGETNAME
 
 # adapter speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG 
= 1MHz
 adapter_khz 1000
@@ -51,9 +59,9 @@ adapter_nsrst_delay 100
 reset_config srst_nogate
 
 if {![using_hla]} {
-   # if srst is not fitted use SYSRESETREQ to
-   # perform a soft reset
-   cortex_m reset_config sysresetreq
+       # if srst is not fitted use SYSRESETREQ to
+       # perform a soft reset
+       cortex_m reset_config sysresetreq
 }
 
 proc stm32f0x_default_reset_start {} {

-- 

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