This is an automated email from Gerrit. Antonio Borneo ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4661
-- gerrit commit b5e863035910cbb265f0e00c380fa10d75236df8 Author: Antonio Borneo <[email protected]> Date: Thu Aug 9 18:51:58 2018 +0200 [WIP/RFC] gdb_server: add support for multi-architecture GDB GDB can be built for multi-architecture through the command ./configure --enable-targets=all && make Such multi-architecture GDB requires the target's architecture to be selected either manually by the user through the GDB command "set architecture" or automatically by the target description sent by the remote target. http://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html Instrument OpenOCD to send the target architecture string to GDB in the target description. Add the placehold for the architecture name in struct target_type and if it is set then forward it to GDB. Assign the architecture name to every target where I can identify it. Note: the strings for stm8 and riscv are not merged in GDB yet and could change later on. Change-Id: Ia02dab2ff76cf0b91deb8fa44754529f4773dcac Signed-off-by: Antonio Borneo <[email protected]> diff --git a/src/server/gdb_server.c b/src/server/gdb_server.c index 69afb2f..87fc5fe 100644 --- a/src/server/gdb_server.c +++ b/src/server/gdb_server.c @@ -2229,6 +2229,11 @@ static int gdb_generate_target_description(struct target *target, char **tdesc_o "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">\n" "<target version=\"1.0\">\n"); + if (target->type->gdb_architecture) + xml_printf(&retval, &tdesc, &pos, &size, + "<architecture>%s</architecture>\n", + target->type->gdb_architecture); + /* generate target description according to register list */ if (features != NULL) { while (features[current_feature]) { diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 454de9e..c7aca47 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -2825,6 +2825,7 @@ struct target_type aarch64_target = { /* REVISIT allow exporting VFP3 registers ... */ .get_gdb_reg_list = armv8_get_gdb_reg_list, + .gdb_architecture = "aarch64", .read_memory = aarch64_read_memory, .write_memory = aarch64_write_memory, diff --git a/src/target/arm11.c b/src/target/arm11.c index 13fbd20..a5f93f6 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1363,6 +1363,7 @@ struct target_type arm11_target = { .deassert_reset = arm11_deassert_reset, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm11_read_memory, .write_memory = arm11_write_memory, diff --git a/src/target/arm720t.c b/src/target/arm720t.c index bcbfa9d..3d0c58d 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -561,6 +561,7 @@ struct target_type arm720t_target = { .soft_reset_halt = arm720t_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm720t_read_memory, .write_memory = arm7_9_write_memory_opt, diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 9dcb302..29e125b 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -700,6 +700,7 @@ struct target_type arm7tdmi_target = { .soft_reset_halt = arm7_9_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm7_9_read_memory, .write_memory = arm7_9_write_memory_opt, diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 7927a2b..6c6af4f 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -1694,6 +1694,7 @@ struct target_type arm920t_target = { .soft_reset_halt = arm920t_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm920t_read_memory, .write_memory = arm7_9_write_memory_opt, diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index 58de778..c2e952d 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -805,6 +805,7 @@ struct target_type arm926ejs_target = { .soft_reset_halt = arm926ejs_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm7_9_read_memory, .write_memory = arm7_9_write_memory_opt, diff --git a/src/target/arm946e.c b/src/target/arm946e.c index 06c9fc3..7228aa6 100644 --- a/src/target/arm946e.c +++ b/src/target/arm946e.c @@ -757,6 +757,7 @@ struct target_type arm946e_target = { .soft_reset_halt = arm7_9_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", /* .read_memory = arm7_9_read_memory, */ /* .write_memory = arm7_9_write_memory, */ diff --git a/src/target/arm966e.c b/src/target/arm966e.c index 0429c54..0d95069 100644 --- a/src/target/arm966e.c +++ b/src/target/arm966e.c @@ -260,6 +260,7 @@ struct target_type arm966e_target = { .soft_reset_halt = arm7_9_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm7_9_read_memory, .write_memory = arm7_9_write_memory_opt, diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 82b430f..c57c017 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -903,6 +903,7 @@ struct target_type arm9tdmi_target = { .soft_reset_halt = arm7_9_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm7_9_read_memory, .write_memory = arm7_9_write_memory_opt, diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 4aae5e4..947b5bf 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -3479,6 +3479,7 @@ struct target_type cortexa_target = { /* REVISIT allow exporting VFP3 registers ... */ .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = cortex_a_read_memory, .write_memory = cortex_a_write_memory, @@ -3558,6 +3559,7 @@ struct target_type cortexr4_target = { /* REVISIT allow exporting VFP3 registers ... */ .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = cortex_a_read_phys_memory, .write_memory = cortex_a_write_phys_memory, diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index ca3dbec..921a3a1 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -2500,6 +2500,7 @@ struct target_type cortexm_target = { .soft_reset_halt = cortex_m_soft_reset_halt, .get_gdb_reg_list = armv7m_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = cortex_m_read_memory, .write_memory = cortex_m_write_memory, diff --git a/src/target/fa526.c b/src/target/fa526.c index 9f6b805..ca2d85f 100644 --- a/src/target/fa526.c +++ b/src/target/fa526.c @@ -365,6 +365,7 @@ struct target_type fa526_target = { .soft_reset_halt = arm920t_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm920t_read_memory, .write_memory = arm7_9_write_memory_opt, diff --git a/src/target/feroceon.c b/src/target/feroceon.c index 6b14ab6..be497da 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -711,6 +711,7 @@ struct target_type feroceon_target = { .soft_reset_halt = arm926ejs_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm7_9_read_memory, .write_memory = arm7_9_write_memory_opt, @@ -748,6 +749,7 @@ struct target_type dragonite_target = { .soft_reset_halt = arm7_9_soft_reset_halt, .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = arm7_9_read_memory, .write_memory = arm7_9_write_memory_opt, diff --git a/src/target/hla_target.c b/src/target/hla_target.c index 9ebf241..72961d0 100644 --- a/src/target/hla_target.c +++ b/src/target/hla_target.c @@ -821,6 +821,7 @@ struct target_type hla_target = { .step = adapter_step, .get_gdb_reg_list = armv7m_get_gdb_reg_list, + .gdb_architecture = "arm", .read_memory = adapter_read_memory, .write_memory = adapter_write_memory, diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 20c707b..6f75ae4 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -1481,6 +1481,7 @@ struct target_type mips_m4k_target = { .deassert_reset = mips_m4k_deassert_reset, .get_gdb_reg_list = mips32_get_gdb_reg_list, + .gdb_architecture = "mips", .read_memory = mips_m4k_read_memory, .write_memory = mips_m4k_write_memory, diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c index 29489a0..4142b3b 100644 --- a/src/target/nds32_v2.c +++ b/src/target/nds32_v2.c @@ -754,6 +754,7 @@ struct target_type nds32_v2_target = { /* register access */ .get_gdb_reg_list = nds32_get_gdb_reg_list, + .gdb_architecture = "n1h", /* memory access */ .read_buffer = nds32_v2_read_buffer, diff --git a/src/target/nds32_v3.c b/src/target/nds32_v3.c index e5d146b..bfa9ced 100644 --- a/src/target/nds32_v3.c +++ b/src/target/nds32_v3.c @@ -485,6 +485,7 @@ struct target_type nds32_v3_target = { /* register access */ .get_gdb_reg_list = nds32_get_gdb_reg_list, + .gdb_architecture = "nds32", /* memory access */ .read_buffer = nds32_v3_read_buffer, diff --git a/src/target/nds32_v3m.c b/src/target/nds32_v3m.c index 86903a5..7656754 100644 --- a/src/target/nds32_v3m.c +++ b/src/target/nds32_v3m.c @@ -472,6 +472,7 @@ struct target_type nds32_v3m_target = { /* register access */ .get_gdb_reg_list = nds32_get_gdb_reg_list, + .gdb_architecture = "nds32", /* memory access */ .read_buffer = nds32_v3_read_buffer, diff --git a/src/target/openrisc/or1k.c b/src/target/openrisc/or1k.c index bcb648c..5d0b824 100644 --- a/src/target/openrisc/or1k.c +++ b/src/target/openrisc/or1k.c @@ -1443,6 +1443,7 @@ struct target_type or1k_target = { .soft_reset_halt = or1k_soft_reset_halt, .get_gdb_reg_list = or1k_get_gdb_reg_list, + .gdb_architecture = "or1k", .read_memory = or1k_read_memory, .write_memory = or1k_write_memory, diff --git a/src/target/quark_d20xx.c b/src/target/quark_d20xx.c index 42d3b8c..42b5534 100644 --- a/src/target/quark_d20xx.c +++ b/src/target/quark_d20xx.c @@ -102,6 +102,7 @@ struct target_type quark_d20xx_target = { /* common x86 code */ .commands = x86_32_command_handlers, .get_gdb_reg_list = x86_32_get_gdb_reg_list, + .gdb_architecture = "i386", .read_memory = x86_32_common_read_memory, .write_memory = x86_32_common_write_memory, .add_breakpoint = x86_32_common_add_breakpoint, diff --git a/src/target/quark_x10xx.c b/src/target/quark_x10xx.c index 525d39a..93ad115 100644 --- a/src/target/quark_x10xx.c +++ b/src/target/quark_x10xx.c @@ -86,6 +86,7 @@ struct target_type quark_x10xx_target = { .add_watchpoint = x86_32_common_add_watchpoint, .commands = x86_32_command_handlers, .get_gdb_reg_list = x86_32_get_gdb_reg_list, + .gdb_architecture = "i386", .mmu = x86_32_common_mmu, .read_memory = x86_32_common_read_memory, .read_phys_memory = x86_32_common_read_phys_mem, diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 8d76c4a..1ae4a88 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -1580,6 +1580,7 @@ struct target_type riscv_target = { .checksum_memory = riscv_checksum_memory, .get_gdb_reg_list = riscv_get_gdb_reg_list, + .gdb_architecture = "riscv", .add_breakpoint = riscv_add_breakpoint, .remove_breakpoint = riscv_remove_breakpoint, diff --git a/src/target/stm8.c b/src/target/stm8.c index 5a3438a..ec161eb 100644 --- a/src/target/stm8.c +++ b/src/target/stm8.c @@ -2200,6 +2200,7 @@ struct target_type stm8_target = { .deassert_reset = stm8_reset_deassert, .get_gdb_reg_list = stm8_get_gdb_reg_list, + .gdb_architecture = "stm8", /* REVISIT value not upstreamed in gdb yet */ .read_memory = stm8_read_memory, .write_memory = stm8_write_memory, diff --git a/src/target/target_type.h b/src/target/target_type.h index fbbd57d..837e32c 100644 --- a/src/target/target_type.h +++ b/src/target/target_type.h @@ -102,6 +102,15 @@ struct target_type { int (*get_gdb_reg_list)(struct target *target, struct reg **reg_list[], int *reg_list_size, enum target_register_class reg_class); + /** + * Architecture name passed to GDB for automatic selection in case of + * multi-architecture GDB. + * If this field is not set, user can still use a single-architecture + * GDB or can select it in multi-architecture GDB with the command + * "set architecture <arch>". + */ + const char *gdb_architecture; + /* target memory access * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) * count: number of items of <size> diff --git a/src/target/xscale.c b/src/target/xscale.c index 87a3d0f..0a8f4bc 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -3702,8 +3702,12 @@ struct target_type xscale_target = { .assert_reset = xscale_assert_reset, .deassert_reset = xscale_deassert_reset, - /* REVISIT on some cores, allow exporting iwmmxt registers ... */ + /* + * REVISIT on some cores, allow exporting iwmmxt registers ... + * (then also change gdb_architecture to "iwmmxt" or "iwmmxt2" to let GDB know it) + */ .get_gdb_reg_list = arm_get_gdb_reg_list, + .gdb_architecture = "arm", /* "iwmmxt" or "iwmmxt2" */ .read_memory = xscale_read_memory, .read_phys_memory = xscale_read_phys_memory, -- ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
