This is an automated email from Gerrit. Christopher Head ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/4678
-- gerrit commit 800948c5dab0c20c763c18eceb401aa5ff8cc360 Author: Christopher Head <[email protected]> Date: Wed Sep 19 16:20:26 2018 -0700 target/atsamv: make APCSW cacheable Change-Id: Ic00d3192642c682f370a6f7f8b70ae29744eb746 Signed-off-by: Christopher Head <[email protected]> diff --git a/tcl/target/atsamv.cfg b/tcl/target/atsamv.cfg index d1f8454..1d026aa 100644 --- a/tcl/target/atsamv.cfg +++ b/tcl/target/atsamv.cfg @@ -50,3 +50,10 @@ if {![using_hla]} { set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME atsamv 0x00400000 0 0 0 $_TARGETNAME +# Set CSW[27], which according to ARM ADI v5 appendix E1.4 maps to AHB signal +# HPROT[3], which according to AMBA AHB/ASB/APB specification chapter 3.7.3 +# makes the data access cacheable. This allows reading and writing data in the +# CPU cache from the debugger, which is far more useful than going straight to +# RAM when operating on typical variables, and is generally no worse when +# operating on special memory locations. +$_CHIPNAME.dap apcsw 0x08000000 0x08000000 -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
