[OpenOCD-devel] [PATCH]: 12840a4 armv7a: Improve parsing of MPIDR register to avoid error message for Cortex R5

[gerrit]

This is an automated email from Gerrit.

Tommy Vestermark (t...@vestermark.dk) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/5108

-- gerrit

commit 12840a4ecb7750488e0d78e4a1bcfcf735293354
Author: Tommy Vestermark <t...@vestermark.dk>
Date:   Thu Apr 11 20:40:36 2019 +1000

    armv7a: Improve parsing of MPIDR register to avoid error message for Cortex 
R5
    
    References:
    - ARM DDI0460D Cortex-R5 Technical Reference Manual section 4.3.6
    - ARM 100048_0002_0 Cortex-A73 Technical Reference Manual section 4.5.2
    
    Tested on: TMS570LC4357
    
    Change-Id: Ie0d45fb697697f78cc4ad4e7a0116be9772590ba
    Signed-off-by: Tommy Vestermark <t...@vestermark.dk>

diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 437a2f2..0d591f8 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -307,23 +307,20 @@ static int armv7a_read_mpidr(struct target *target)
        if (retval != ERROR_OK)
                goto done;
 
-       /* ARMv7R uses a different format for MPIDR.
-        * When configured uniprocessor (most R cores) it reads as 0.
-        * This will need to be implemented for multiprocessor ARMv7R cores. */
-       if (armv7a->is_armv7r) {
-               if (mpidr)
-                       LOG_ERROR("MPIDR nonzero in ARMv7-R target");
-               goto done;
-       }
-
        if (mpidr & 1<<31) {
+               LOG_DEBUG("%s: MPIDR 0x%" PRIx32, target_name(target), mpidr);
                armv7a->multi_processor_system = (mpidr >> 30) & 1;
+               armv7a->multi_threading_processor = (mpidr >> 24) & 1;
+               armv7a->level2_id = (mpidr >> 16) & 0xf;
                armv7a->cluster_id = (mpidr >> 8) & 0xf;
-               armv7a->cpu_id = mpidr & 0x3;
-               LOG_INFO("%s cluster %x core %x %s", target_name(target),
+               armv7a->cpu_id = mpidr & 0xf;
+               LOG_INFO("%s: MPIDR level2 %x, cluster %x, core %x, %s, %s",
+                       target_name(target),
+                       armv7a->level2_id,
                        armv7a->cluster_id,
                        armv7a->cpu_id,
-                       armv7a->multi_processor_system == 0 ? "multi core" : 
"mono core");
+                       armv7a->multi_processor_system == 0 ? "multi core" : 
"mono core",
+                       armv7a->multi_threading_processor == 1 ? "SMT" : "no 
SMT");
 
        } else
                LOG_ERROR("MPIDR not in multiprocessor format");
diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index 1e88c98..577abcb 100644
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -108,6 +108,8 @@ struct armv7a_common {
        struct adiv5_ap *debug_ap;
        /* mdir */
        uint8_t multi_processor_system;
+       uint8_t multi_threading_processor;
+       uint8_t level2_id;
        uint8_t cluster_id;
        uint8_t cpu_id;
        bool is_armv7r;

-- 


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