This is an automated email from Gerrit.
Marek Vasut (marek.va...@gmail.com) just uploaded a new patch set to Gerrit,
which you can find at http://openocd.zylin.com/5140
-- gerrit
commit 8bada97d2f7c673f83148d31f3e3d9e61f0a301b
Author: Marek Vasut <marek.va...@gmail.com>
Date: Tue Apr 2 05:28:17 2019 +0200
tcl/target: Fix V3M/V3H SoC chipname
The V3M SoC is R8A77970 while the V3H SoC is R8A77980 . Update the
CHIPNAME and swap the SoCs to keep the list sorted.
Change-Id: I7e1777c0c7181e5e0beac98333f2047cb443d0df
Signed-off-by: Marek Vasut <marek.va...@gmail.com>
diff --git a/tcl/target/renesas_rcar_gen3.cfg b/tcl/target/renesas_rcar_gen3.cfg
index a6eef67..2c478b2 100644
--- a/tcl/target/renesas_rcar_gen3.cfg
+++ b/tcl/target/renesas_rcar_gen3.cfg
@@ -47,17 +47,17 @@ switch $_soc {
set _num_cr7 1
set _boot_core CA57
}
- V3H {
+ V3M {
set _CHIPNAME r8a77970
set _num_ca57 0
- set _num_ca53 4
+ set _num_ca53 2
set _num_cr7 1
set _boot_core CA53
}
- V3M {
+ V3H {
set _CHIPNAME r8a77980
set _num_ca57 0
- set _num_ca53 2
+ set _num_ca53 4
set _num_cr7 1
set _boot_core CA53
}
--
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