This is an automated email from Gerrit. Tarek BOCHKATI ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5291
-- gerrit commit 78805d8c9ba18060777ec82ee79267f6696981ef Author: Tarek BOCHKATI <[email protected]> Date: Tue Aug 27 17:44:39 2019 +0200 flash/nor/stm32h7x: avoid using FLASH_REG_BASE_B0, and use bank registers For dual bank devices, each option register is mapped in 2 addresses at the same offset from flash_bank_reg_base. This is true for OPTCR, OPTKEYR, OPTSR_CUR/PRG, OPTCCR according to RM0433.rev5 (refer to section 3.9: FLASH registers) Change-Id: Ie24a91f069d03c9233797390fc2e925c737dad90 Signed-off-by: Tarek BOCHKATI <[email protected]> diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c index 1ee1e81..e0ce041 100644 --- a/src/flash/nor/stm32h7x.c +++ b/src/flash/nor/stm32h7x.c @@ -263,7 +263,7 @@ static int stm32x_unlock_option_reg(struct flash_bank *bank) uint32_t ctrl; struct target *target = bank->target; - int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCR, &ctrl); + int retval = target_read_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTCR), &ctrl); if (retval != ERROR_OK) return retval; @@ -271,15 +271,15 @@ static int stm32x_unlock_option_reg(struct flash_bank *bank) return ERROR_OK; /* unlock option registers */ - retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTKEYR, OPTKEY1); + retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTKEYR), OPTKEY1); if (retval != ERROR_OK) return retval; - retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTKEYR, OPTKEY2); + retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTKEYR), OPTKEY2); if (retval != ERROR_OK) return retval; - retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCR, &ctrl); + retval = target_read_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTCR), &ctrl); if (retval != ERROR_OK) return retval; @@ -310,7 +310,7 @@ static int stm32x_read_options(struct flash_bank *bank) struct target *target = bank->target; /* read current option bytes */ - int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_CUR, &optiondata); + int retval = target_read_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTSR_CUR), &optiondata); if (retval != ERROR_OK) return retval; @@ -349,7 +349,7 @@ static int stm32x_write_options(struct flash_bank *bank) optiondata |= (stm32x_info->option_bytes.user3_options & 0xa3) << 24; /* program options */ - retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_PRG, optiondata); + retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTSR_PRG), optiondata); if (retval != ERROR_OK) return retval; @@ -361,12 +361,12 @@ static int stm32x_write_options(struct flash_bank *bank) optiondata = 0x40000000; /* Remove OPT error flag before programming */ - retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCCR, optiondata); + retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTCCR), optiondata); if (retval != ERROR_OK) return retval; /* start programming cycle */ - retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCR, OPT_START); + retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTCR), OPT_START); if (retval != ERROR_OK) return retval; @@ -374,7 +374,7 @@ static int stm32x_write_options(struct flash_bank *bank) int timeout = FLASH_ERASE_TIMEOUT; for (;;) { uint32_t status; - retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_SR, &status); + retval = target_read_u32(target, stm32x_get_flash_reg(bank, FLASH_SR), &status); if (retval != ERROR_OK) { LOG_INFO("stm32x_write_options: wait_flash_op_queue : error"); return retval; @@ -390,7 +390,7 @@ static int stm32x_write_options(struct flash_bank *bank) } /* relock option registers */ - retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCR, OPT_LOCK); + retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_OPTCR), OPT_LOCK); if (retval != ERROR_OK) return retval; @@ -904,13 +904,6 @@ COMMAND_HANDLER(stm32x_handle_lock_command) stm32x_info = bank->driver_priv; target = bank->target; - /* if we have a dual flash bank device then - * we need to perform option byte lock on bank0 only */ - if (stm32x_info->flash_base != FLASH_REG_BASE_B0) { - LOG_ERROR("Option Byte Lock Operation must use bank0"); - return ERROR_FLASH_OPERATION_FAILED; - } - if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; @@ -950,13 +943,6 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) stm32x_info = bank->driver_priv; target = bank->target; - /* if we have a dual flash bank device then - * we need to perform option byte unlock on bank0 only */ - if (stm32x_info->flash_base != FLASH_REG_BASE_B0) { - LOG_ERROR("Option Byte Unlock Operation must use bank0"); - return ERROR_FLASH_OPERATION_FAILED; - } - if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
