This is an automated email from Gerrit. Tomas Vanek ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5360
-- gerrit commit 447fb7214e595c3c64b4fa04d4ce49a3074cf611 Author: Tomas Vanek <[email protected]> Date: Sat Dec 14 18:55:01 2019 +0100 flash/nor/stm32l4x: fix minor errors in flash write/async algo Fix comment of tested errors in asm src. List all relevant errors in FLASH_ERROR mask: FLASH_PROGERR was missing and any trial to re-program already programmed double word ended up in the error bit held uncleared and flash write permanetly repeating the error message until reset. Lock the bank also after unsuccesfull write_block run. Set async alog block size to size of double word. Remove warning in case of write_block success. In case of error use LOG_ERROR instead of warning. Change-Id: Ibf6d5e306a4c2eaa43de67d636b4902c737f02f3 Signed-off-by: Tomas Vanek <[email protected]> diff --git a/contrib/loaders/flash/stm32/stm32l4x.S b/contrib/loaders/flash/stm32/stm32l4x.S index 9c49016..e0ce3cb 100644 --- a/contrib/loaders/flash/stm32/stm32l4x.S +++ b/contrib/loaders/flash/stm32/stm32l4x.S @@ -71,7 +71,7 @@ busy: ldr r6, [r4, #STM32_FLASH_SR_OFFSET] tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */ bne busy /* wait more... */ - tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/ + tst r6, #0xfa /* PGSERR | SIZERR | PGAERR | WRPERR | PROGERR | OPERR */ bne error /* fail... */ cmp r5, r1 /* wrap rp at end of buffer */ diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 19475c3..1a8d7f5 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -97,7 +97,7 @@ #define FLASH_PROGERR (1 << 3) /* Programming error */ #define FLASH_OPERR (1 << 1) /* Operation error */ #define FLASH_EOP (1 << 0) /* End of operation */ -#define FLASH_ERROR (FLASH_PGSERR | FLASH_PGSERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_OPERR) +#define FLASH_ERROR (FLASH_PGSERR | FLASH_SIZERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_PROGERR | FLASH_OPERR) /* FLASH_OPTR bit definitions (reading) */ #define OPT_DB1M (1 << 21) /* dual bank for devices up to 1M flash */ @@ -586,7 +586,7 @@ static int stm32l4_protect(struct flash_bank *bank, int set, int first, int last return ret; } -/* Count is in halfwords */ +/* Count is in double-words */ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { @@ -644,10 +644,10 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size); buf_set_u32(reg_params[2].value, 0, 32, address); - buf_set_u32(reg_params[3].value, 0, 32, count / 4); + buf_set_u32(reg_params[3].value, 0, 32, count); buf_set_u32(reg_params[4].value, 0, 32, stm32l4_info->flash_regs_base); - retval = target_run_flash_async_algorithm(target, buffer, count, 2, + retval = target_run_flash_async_algorithm(target, buffer, count, 8, 0, NULL, 5, reg_params, source->address, source->size, @@ -685,7 +685,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count) { - int retval; + int retval, retval2; if (bank->target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); @@ -701,14 +701,15 @@ static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer, if (retval != ERROR_OK) return retval; - retval = stm32l4_write_block(bank, buffer, offset, count / 2); + retval = stm32l4_write_block(bank, buffer, offset, count / 8); + + retval2 = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK); + if (retval != ERROR_OK) { - LOG_WARNING("block write failed"); + LOG_ERROR("block write failed"); return retval; } - - LOG_WARNING("block write succeeded"); - return stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK); + return retval2; } static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id) -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
