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Tarek BOCHKATI ([email protected]) just uploaded a new patch set to 
Gerrit, which you can find at http://openocd.zylin.com/5541

-- gerrit

commit e7b894b9b0930bc1e485c319c2505926b4432fec
Author: Tarek BOCHKATI <[email protected]>
Date:   Wed Mar 25 21:52:44 2020 +0100

    flash/stm32l4x: probe tzen and rdp values
    
    introduction of 'enum stm32l4_rdp' enumerating possible RDP levels for
    devices with and without TrustZone.
    
    also in 'stm32l4_flash_bank' structure we added and rdp and tzen members
    to store read values by the helper 'stm32l4_sync_rdp_tzen'
    
    these new members are used to display security and protection status
    while probing the flash.
    
    Change-Id: Icf883189715278a3323fe210d295047678b16592
    Signed-off-by: Tarek BOCHKATI <[email protected]>

diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index d5b08ec..30ea623 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -132,6 +132,13 @@ enum reg_param_type {
        REG_INDEX,
 };
 
+enum stm32l4_rdp {
+       RDP_LEVEL_0   = 0xAA,
+       RDP_LEVEL_0_5 = 0x55, /* for devices with TrustZone enabled */
+       RDP_LEVEL_1   = 0x00,
+       RDP_LEVEL_2   = 0xCC
+};
+
 enum stm32l4_flash_reg {
        STM32_FLASH_ACR,
        STM32_FLASH_KEYR,
@@ -202,6 +209,8 @@ struct stm32l4_flash_bank {
        const struct stm32l4_part_info *part_info;
        const uint32_t *flash_regs;
        bool otp_enabled;
+       enum stm32l4_rdp rdp;
+       bool tzen;
 };
 
 enum stm32_bank_id {
@@ -553,6 +562,35 @@ static inline int stm32l4_read_flash_reg(struct flash_bank 
*bank, uint32_t reg,
        return target_read_u32(bank->target, stm32l4_get_flash_reg(bank, reg, 
reg_param_type), value);
 }
 
+static void stm32l4_sync_rdp_tzen(struct flash_bank *bank, uint32_t optr_value)
+{
+       struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
+
+       bool tzen = false;
+
+       if (stm32l4_info->part_info->flags & F_HAS_TZ)
+               tzen = (optr_value & FLASH_TZEN) != 0;
+
+       uint32_t rdp = optr_value & FLASH_RDP_MASK;
+
+       /* for devices without TrustZone:
+        *   RDP level 0 and 2 values are to 0xAA and 0xCC
+        *   Any other value corresponds to RDP level 1
+        * for devices with TrusZone:
+        *   RDP level 0 and 2 values are 0xAA and 0xCC
+        *   RDP level 0.5 value is 0x55 only if TZEN = 1
+        *   Any other value corresponds to RDP level 1, including 0x55 if TZEN 
= 0
+        */
+
+       if (rdp != RDP_LEVEL_0 && rdp != RDP_LEVEL_2) {
+               if (!tzen || (tzen && rdp != RDP_LEVEL_0_5))
+                       rdp = RDP_LEVEL_1;
+       }
+
+       stm32l4_info->tzen = tzen;
+       stm32l4_info->rdp = rdp;
+}
+
 static inline int stm32l4_write_flash_reg(struct flash_bank *bank, uint32_t 
reg,
        enum reg_param_type reg_param_type, uint32_t value)
 {
@@ -1206,6 +1244,22 @@ static int stm32l4_probe(struct flash_bank *bank)
 
        LOG_INFO("device idcode = 0x%08" PRIx32 " (%s)", stm32l4_info->idcode, 
device_info);
 
+       /* read flash option register */
+       retval = stm32l4_read_flash_reg(bank, STM32_FLASH_OPTR, REG_INDEX, 
&options);
+       if (retval != ERROR_OK)
+               return retval;
+
+       stm32l4_sync_rdp_tzen(bank, options);
+
+       if (part_info->flags & F_HAS_TZ)
+               LOG_INFO("TZEN = %d : TrustZone %s by option bytes",
+                               stm32l4_info->tzen,
+                               stm32l4_info->tzen ? "enabled" : "disabled");
+
+       LOG_INFO("RDP level %s (0x%02X)",
+                       stm32l4_info->rdp == RDP_LEVEL_0 ? "0" : 
stm32l4_info->rdp == RDP_LEVEL_0_5 ? "0.5" : "1",
+                       stm32l4_info->rdp);
+
        if (stm32l4_is_otp(bank)) {
                bank->size = part_info->otp_size;
 
@@ -1223,7 +1277,6 @@ static int stm32l4_probe(struct flash_bank *bank)
                        return ERROR_FAIL;
                }
 
-
                stm32l4_info->probed = true;
                return ERROR_OK;
        } else if (bank->base != STM32_FLASH_BANK_BASE) {
@@ -1255,11 +1308,6 @@ static int stm32l4_probe(struct flash_bank *bank)
        /* did we assign a flash size? */
        assert((flash_size_kb != 0xffff) && flash_size_kb);
 
-       /* read flash option register */
-       retval = stm32l4_read_flash_reg(bank, STM32_FLASH_OPTR, REG_INDEX, 
&options);
-       if (retval != ERROR_OK)
-               return retval;
-
        stm32l4_info->bank1_sectors = 0;
        stm32l4_info->hole_sectors = 0;
 
@@ -1662,7 +1710,7 @@ COMMAND_HANDLER(stm32l4_handle_lock_command)
        }
 
        /* set readout protection level 1 by erasing the RDP option byte */
-       if (stm32l4_write_option(bank, STM32_FLASH_OPTR, REG_INDEX, 0, 
0x000000FF) != ERROR_OK) {
+       if (stm32l4_write_option(bank, STM32_FLASH_OPTR, REG_INDEX, 
RDP_LEVEL_1, FLASH_RDP_MASK) != ERROR_OK) {
                command_print(CMD, "%s failed to lock device", 
bank->driver->name);
                return ERROR_OK;
        }
@@ -1694,7 +1742,7 @@ COMMAND_HANDLER(stm32l4_handle_unlock_command)
                return ERROR_TARGET_NOT_HALTED;
        }
 
-       if (stm32l4_write_option(bank, STM32_FLASH_OPTR, REG_INDEX, 
RDP_LEVEL_0, 0x000000FF) != ERROR_OK) {
+       if (stm32l4_write_option(bank, STM32_FLASH_OPTR, REG_INDEX, 
RDP_LEVEL_0, FLASH_RDP_MASK) != ERROR_OK) {
                command_print(CMD, "%s failed to unlock device", 
bank->driver->name);
                return ERROR_OK;
        }
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index 3e810a0..41b5ff8 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -56,9 +56,9 @@
 #define OPTKEY1                                        0x08192A3B
 #define OPTKEY2                                        0x4C5D6E7F
 
-#define RDP_LEVEL_0                            0xAA
-#define RDP_LEVEL_1                            0xBB
-#define RDP_LEVEL_2                            0xCC
+/* FLASH_OPTR register bits */
+#define FLASH_RDP_MASK                 0xFF
+#define FLASH_TZEN                             (1 << 31)
 
 /* other registers */
 #define DBGMCU_IDCODE_G0               0x40015800

-- 


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