This is an automated email from Gerrit. Ake Rehnman (ake.rehn...@gmail.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5548
-- gerrit commit 830dffff133e87a8869166f783506e05cf7807ef Author: Ake Rehnman <ake.rehn...@gmail.com> Date: Sun Mar 29 21:57:53 2020 +0200 stm8 target: make adapter speed settings work Previously the adapter speed settings were hard-coded to connect with low speed then switch over to high speed regardless what was mentioned in the cfg files. Now the stm8 target intercept adapter speed settings and configure the stm8 control registers accordingly. Change-Id: I7419514e5214e4b43b9d51253cf5b7f04a233533 Signed-off-by: Ake Rehnman <ake.rehn...@gmail.com> diff --git a/src/target/stm8.c b/src/target/stm8.c index c06e0fa..36f93e4 100644 --- a/src/target/stm8.c +++ b/src/target/stm8.c @@ -45,6 +45,8 @@ static int stm8_set_breakpoint(struct target *target, static void stm8_enable_watchpoints(struct target *target); static int stm8_unset_watchpoint(struct target *target, struct watchpoint *watchpoint); +static int (*adapter_speed)(int speed); +extern struct adapter_driver *adapter_driver; static const struct { unsigned id; @@ -797,8 +799,30 @@ static int stm8_read_memory(struct target *target, target_addr_t address, return retval; } +static int stm8_speed(int speed) +{ + int retval; + uint8_t csr; + + LOG_DEBUG("stm8_speed: %d", speed); + + csr = SAFE_MASK | SWIM_DM; + if (speed > SWIM_FREQ_LOW) + csr |= HS; + + LOG_DEBUG("writing B0 to SWIM_CSR (SAFE_MASK + SWIM_DM + HS:%d)", csr & HS ? 1 : 0); + retval = stm8_write_u8(NULL, SWIM_CSR, csr); + if (retval != ERROR_OK) + return retval; + return adapter_speed(speed); +} + static int stm8_init(struct command_context *cmd_ctx, struct target *target) { + /* intercept adapter_driver->speed() calls */ + adapter_speed = adapter_driver->speed; + adapter_driver->speed = stm8_speed; + stm8_build_reg_cache(target); return ERROR_OK; @@ -1660,17 +1684,6 @@ static int stm8_examine(struct target *target) if (!target_was_examined(target)) { if (!stm8->swim_configured) { - /* set SWIM_CSR = 0xa0 (enable mem access & mask reset) */ - LOG_DEBUG("writing A0 to SWIM_CSR (SAFE_MASK + SWIM_DM)"); - retval = stm8_write_u8(target, SWIM_CSR, SAFE_MASK + SWIM_DM); - if (retval != ERROR_OK) - return retval; - /* set high speed */ - LOG_DEBUG("writing B0 to SWIM_CSR (SAFE_MASK + SWIM_DM + HS)"); - retval = stm8_write_u8(target, SWIM_CSR, SAFE_MASK + SWIM_DM + HS); - if (retval != ERROR_OK) - return retval; - jtag_config_khz(SWIM_FREQ_HIGH); stm8->swim_configured = true; /* Now is the time to deassert reset if connect_under_reset. diff --git a/tcl/target/stm8l.cfg b/tcl/target/stm8l.cfg index 782350f..a06c4cb 100644 --- a/tcl/target/stm8l.cfg +++ b/tcl/target/stm8l.cfg @@ -78,8 +78,10 @@ $_TARGETNAME configure -optionstart $_OPTIONSTART -optionend $_OPTIONEND -blocks # Set stm8l type $_TARGETNAME configure -enable_stm8l -# Set low speed at debug entry -adapter speed 363 +# Set high speed +adapter speed 800 +# Set low speed +#adapter speed 363 reset_config srst_only diff --git a/tcl/target/stm8s.cfg b/tcl/target/stm8s.cfg index 277cdc9..2dae655 100644 --- a/tcl/target/stm8s.cfg +++ b/tcl/target/stm8s.cfg @@ -75,8 +75,10 @@ $_TARGETNAME configure -optionstart $_OPTIONSTART -optionend $_OPTIONEND -blocks # Uncomment this line to enable interrupts while instruction step #$_TARGETNAME configure -enable_step_irq -# Set low speed at debug entry -adapter speed 363 +# Set high speed +adapter speed 800 +# Set low speed +#adapter speed 363 reset_config srst_only -- _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel