This is an automated email from Gerrit. Kenta IDA ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5726
-- gerrit commit 181b54defd07fb9bd706af5d53f474016efcc3bd Author: Kenta IDA <[email protected]> Date: Sat Jun 27 23:53:24 2020 +0900 flash/nor/atsame5: Wait STATUS.READY before issuing a new command In order to prevent NVM program error with higher SWD speed, check STATUS.READY bit to check the previous command is completed and the NVM controller can accept a new command. Valgrind-clean, no new Clang analyzer warnings Change-Id: I6ae5b8a79330ac26bee8c889a5cbcdb9b218f6e5 Signed-off-by: Kenta IDA <[email protected]> diff --git a/src/flash/nor/atsame5.c b/src/flash/nor/atsame5.c index eac7847..5fef142 100644 --- a/src/flash/nor/atsame5.c +++ b/src/flash/nor/atsame5.c @@ -393,12 +393,27 @@ static int same5_wait_and_check_error(struct target *target) static int same5_issue_nvmctrl_command(struct target *target, uint16_t cmd) { int res; + int rep_cnt = 10000; + uint16_t status = 0; if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; } + /* Check if the NVM controller is ready to accept a new command */ + do { + res = target_read_u16(target, + SAMD_NVMCTRL + SAME5_NVMCTRL_STATUS, &status); + if (res != ERROR_OK) + return res; + } while (rep_cnt-- && (status & 1) == 0); + + if ((status & 1) == 0) { + LOG_ERROR("Waiting NVMCTRL ready timed out."); + return ERROR_TIMEOUT_REACHED; + } + /* Issue the NVM command */ /* 32-bit write is used to ensure atomic operation on ST-Link */ res = target_write_u32(target, -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
