Hi, I cannot see any difference between "connect under reset" with and without a call to jaylink_set_speed(). I'm using a STM32F1 development board with a J-Link v10.1 (FW: May 27 2019).
Do have a cloned J-Link device? Can you provide me the traces in a format that can be opened with the sigrok framework [1], to ease further investigation? Best regards, Marc [1] https://sigrok.org/ On Sat, 2020-06-27 at 00:34 +0000, Yunhao Tian via OpenOCD-devel wrote: > I'm using STM32F401 for the test. The openocd config file is in the > attached zip. > To help understanding this problem better, I captured the SWD > sequence using a logic analyzer. The capture files are attached and > can be viewed by DSView. Ch0 in the file is SWCLK, Ch1 is SRST, Ch2 > is SWDIO. You can see that in the NG file the reset line is released > earlier than the OK file, which is certainly not expected. > I tried some debugging, and found that if you comment out line 108 > (adapter speed 2000 in the reset-start event block) in > tcl/target/stm32f4x.cfg, the premature release of srst line will no > longer happen. Also I if you comment out jlink_speed at all, the > problem also disappears. So it is clear that jlink_speed is > deasserting the reset line. > Included in the attachment zip are two logic analyzer capture files > (.dsl), two log files, and the config. openocd-ng.dsl and openocd- > ng.log is produced with the original OpenOCD, which fails to connect > to the MCU; openocd-ok.dsl and openocd-ok.log is produced with the > patch applied (no other files were changed). > I doubt this could also be a Segger bug, of which I sent an email to > them (they did not reply yet). I hope this can be reproduced or > analyzed on your side. > Attachments: > attach.zip (665.4 kB; application/zip) > [tickets:#272] J-Link v9 + STM32: failed to connect under reset > Status: new > Milestone: 0.9.0 > Created: Fri Jun 26, 2020 01:13 PM UTC by Yunhao Tian > Last Updated: Fri Jun 26, 2020 01:13 PM UTC > Owner: nobody > Hi, > I'm using J-Link v9 with STM32. It works fine except > connect_assert_reset. After some investigation I noticed that the > jlink_speed function deasserts the reset line, which caused the STM32 > to boot too early when it's supposed to be in reset state, and leads > to Error: timed out while waiting for target halted problem. > This commit ( > https://github.com/t123yh/openocd/commit/fd1997bc21c1c7199f4715c0e5ab24f64bb8bf90 > ) temproarily fixes the problem, but I wonder if there's a more > elegant solution. > Sent from sourceforge.net because [email protected] > is subscribed to https://sourceforge.net/p/openocd/tickets/ > To unsubscribe from further messages, a project admin can change > settings at https://sourceforge.net/p/openocd/admin/tickets/options. > Or, if this is a mailing list, you can unsubscribe from the mailing > list. > _______________________________________________ > OpenOCD-devel mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/openocd-devel _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
