This is an automated email from Gerrit. Mikhail Rasputin ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5762
-- gerrit commit 9edcd18b0cd5a13ebce447e3e9e525c0ed874eaf Author: Mikhail Rasputin <[email protected]> Date: Mon Jul 13 00:52:15 2020 +0300 aarch64: fix registers cache invalidation If a defer target examination is used, the registers cache won't be invalidated on reset assertion. Change-Id: Ifd0a735fe6afd332829e30c32f1016735dbe2d20 Signed-off-by: Mikhail Rasputin <[email protected]> diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 01d0e94..02bec87 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -1698,10 +1698,8 @@ static int aarch64_assert_reset(struct target *target) } /* registers are now invalid */ - if (target_was_examined(target)) { - register_cache_invalidate(armv8->arm.core_cache); - register_cache_invalidate(armv8->arm.core_cache->next); - } + register_cache_invalidate(armv8->arm.core_cache); + register_cache_invalidate(armv8->arm.core_cache->next); target->state = TARGET_RESET; -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
