This is an automated email from Gerrit.

Jiri Kastner ([email protected]) just uploaded a new patch set to Gerrit, 
which you can find at http://openocd.zylin.com/5773

-- gerrit

commit 91d38861fa6f78b37de3a3bec4162b4d75eb3cc0
Author: Jiri Kastner <[email protected]>
Date:   Wed Jul 15 11:30:34 2020 +0200

    src/target/arm_adi_v5.c: add Cortex-A35 related entries
    
    Change-Id: Ibd57d91fb9b66bc46929f4e93d0bf23c2a32f11a
    Signed-off-by: Jiri Kastner <[email protected]>

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index fe09d0d..197bb7b 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -1078,6 +1078,7 @@ static const struct {
        { ARM_ID, 0x4a3, "Cortex-A53 ROM",             "(v7 Memory Map ROM 
Table)", },
        { ARM_ID, 0x4a4, "Cortex-A72 ROM",             "(ROM Table)", },
        { ARM_ID, 0x4a9, "Cortex-A9 ROM",              "(ROM Table)", },
+       { ARM_ID, 0x4aa, "Cortex-A35 ROM",             "(v8 Memory Map ROM 
Table)", },
        { ARM_ID, 0x4af, "Cortex-A15 ROM",             "(ROM Table)", },
        { ARM_ID, 0x4b5, "Cortex-R5 ROM",              "(ROM Table)", },
        { ARM_ID, 0x4c0, "Cortex-M0+ ROM",             "(ROM Table)", },
@@ -1085,6 +1086,7 @@ static const struct {
        { ARM_ID, 0x4c4, "Cortex-M4 ROM",              "(ROM Table)", },
        { ARM_ID, 0x4c7, "Cortex-M7 PPB ROM",          "(Private Peripheral Bus 
ROM Table)", },
        { ARM_ID, 0x4c8, "Cortex-M7 ROM",              "(ROM Table)", },
+       { ARM_ID, 0x4e0, "Cortex-A35 ROM",             "(v7 Memory Map ROM 
Table)", },
        { ARM_ID, 0x470, "Cortex-M1 ROM",              "(ROM Table)", },
        { ARM_ID, 0x471, "Cortex-M0 ROM",              "(ROM Table)", },
        { ARM_ID, 0x906, "CoreSight CTI",              "(Cross Trigger)", },
@@ -1129,6 +1131,7 @@ static const struct {
        { ARM_ID, 0x9d3, "Cortex-A53 PMU",             "(Performance Monitor 
Unit)", },
        { ARM_ID, 0x9d7, "Cortex-A57 PMU",             "(Performance Monitor 
Unit)", },
        { ARM_ID, 0x9d8, "Cortex-A72 PMU",             "(Performance Monitor 
Unit)", },
+       { ARM_ID, 0x9da, "Cortex-A35 PMU/CTI",             "(Performance 
Monitor Unit/Cross Trigger)", },
        { ARM_ID, 0xc05, "Cortex-A5 Debug",            "(Debug Unit)", },
        { ARM_ID, 0xc07, "Cortex-A7 Debug",            "(Debug Unit)", },
        { ARM_ID, 0xc08, "Cortex-A8 Debug",            "(Debug Unit)", },
@@ -1139,6 +1142,7 @@ static const struct {
        { ARM_ID, 0xc15, "Cortex-R5 Debug",            "(Debug Unit)", },
        { ARM_ID, 0xc17, "Cortex-R7 Debug",            "(Debug Unit)", },
        { ARM_ID, 0xd03, "Cortex-A53 Debug",           "(Debug Unit)", },
+       { ARM_ID, 0xd04, "Cortex-A35 Debug",           "(Debug Unit)", },
        { ARM_ID, 0xd07, "Cortex-A57 Debug",           "(Debug Unit)", },
        { ARM_ID, 0xd08, "Cortex-A72 Debug",           "(Debug Unit)", },
        { 0x097,  0x9af, "MSP432 ROM",                 "(ROM Table)" },

-- 


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