This is an automated email from Gerrit. Sylvain Chouleur (sylvain.choul...@gmail.com) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5853
-- gerrit commit 496b034b17666f733a850e090990f3d1f725a2b4 Author: Sylvain Chouleur <schoul...@graimatterlabs.ai> Date: Mon Oct 12 17:24:05 2020 +0200 cortex_m: support control.FPCA Bit 2 of control register is used if the processor includes the FP extension Change-Id: Ie21bc9de8cae5bad9d841e1908eff3aa0bb29d4b Signed-off-by: Sylvain Chouleur <schoul...@graimatterlabs.ai> diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 55664a7..abc377f 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -541,7 +541,7 @@ static int cortex_m_debug_entry(struct target *target) arm->map = armv7m_msp_reg_map; } else { unsigned control = buf_get_u32(arm->core_cache - ->reg_list[ARMV7M_CONTROL].value, 0, 2); + ->reg_list[ARMV7M_CONTROL].value, 0, 3); /* is this thread privileged? */ arm->core_mode = control & 1 @@ -1678,7 +1678,7 @@ static int cortex_m_load_core_reg_u32(struct target *target, break; case ARMV7M_CONTROL: - *value = buf_get_u32((uint8_t *)value, 24, 2); + *value = buf_get_u32((uint8_t *)value, 24, 3); break; } @@ -1764,7 +1764,7 @@ static int cortex_m_store_core_reg_u32(struct target *target, break; case ARMV7M_CONTROL: - buf_set_u32((uint8_t *)®, 24, 2, value); + buf_set_u32((uint8_t *)®, 24, 3, value); break; } -- _______________________________________________ OpenOCD-devel mailing list OpenOCD-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/openocd-devel