This is an automated email from Gerrit. Antonio Borneo ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5871
-- gerrit commit 072c54d3d1fc6a24d257a45d8e0f08fd7e3ed367 Author: Antonio Borneo <[email protected]> Date: Tue Oct 20 00:34:51 2020 +0200 tcl/ti_cc26x0: fix reset sequence The devices cc26x0 are in 2-pin cJTAG mode after reset, mode not supported by OpenOCD yet. The target script has to send a dedicated sequence to put the chip in 4-pin JTAG mode. When SRST pin is asserted, the debug port becomes not accessible because has switched to cJTAG; use 'reset_config srst_gates_jtag' to handle it. In cortex_m_deassert_reset() the debug port is accessed after the SRST is deasserted, leaving no time to switch from cJTAG to JTAG. This hangs the system. Use the target's event 'reset-deassert-pre', that runs before cortex_m_deassert_reset(), to deassert in advance the SRST and run the magic switch cJTAG to JTAG. Later, cortex_m_deassert_reset() will deassert 'again' SRST, but this will result in a noop. NOTICE: this sequence should be revisited after the reset topic get merged. http://openocd.zylin.com/#/q/topic:reset Change-Id: I6fcd45abc997c93fb089f991847d01be1c72aed3 Signed-off-by: Antonio Borneo <[email protected]> diff --git a/tcl/target/ti_cc26x0.cfg b/tcl/target/ti_cc26x0.cfg index f95d7b2..9d0b99f 100644 --- a/tcl/target/ti_cc26x0.cfg +++ b/tcl/target/ti_cc26x0.cfg @@ -41,6 +41,14 @@ set _TARGETNAME $_CHIPNAME.cpu dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap +# Hack! cortex_m_deassert_reset() deasserts srst and expects the jtag to be fully +# functional. But cc26x0 is in cJTAG mode after srst. +# Enter before cortex_m_deassert_reset(), deassert srst and init jtag to force the +# transition cjtag=>jtag. +# The following deassert srst in cortex_m_deassert_reset() would be a noop. +# FIXME! To be revisited after merge of http://openocd.zylin.com/#/q/topic:reset +$_TARGETNAME configure -event reset-deassert-pre "adapter deassert srst;jtag arp_init" + if { [info exists WORKAREASIZE] } { set _WORKAREASIZE $WORKAREASIZE } else { @@ -52,4 +60,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME cc26xx 0 0 0 0 $_TARGETNAME -cortex_m reset_config vectreset +# srst puts device in cJTAG. Mark jtag as gated! +reset_config srst_only srst_gates_jtag + +adapter srst pulse_width 200 +adapter srst delay 200 -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
