This is an automated email from Gerrit. Alberto García Hierro ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5872
-- gerrit commit 7a108b04e546e72c8ce183c5dd5833d89993a7d1 Author: Alberto García Hierro <[email protected]> Date: Tue Oct 20 16:13:17 2020 +0100 stm32h7x: Fix reset with non-HLA interfaces on macOS regsub doesn't work correctly on macOS Catalina, which results in an incorrect CHIPNAME derived from the current target. Since regsub is only used by this target, replace it with a simple string search for '.' followed by a substring. This is funcionally equivalent to what the regular expression was doing, but instead relies in simpler string operations that should have little to no differences between systems. Also, refactor CHIPNAME detection into proc stm32h7x_chipname, so it's always retrieved in the same way without duplicating the code. Change-Id: Ia9f63f56b508688e74278b022eaec47e503916e7 Signed-off-by: Alberto Garcia Hierro <[email protected]> diff --git a/tcl/target/stm32h7x.cfg b/tcl/target/stm32h7x.cfg index 43a8b02..e47981c 100644 --- a/tcl/target/stm32h7x.cfg +++ b/tcl/target/stm32h7x.cfg @@ -173,10 +173,19 @@ $_CHIPNAME.cpu0 configure -event reset-init { adapter speed 4000 } +# get _CHIPNAME from current target +proc stm32h7x_chipname {} { + set t [target current] + set sep [string last "." $t] + if {$sep == -1} { + return $t + } + return [string range $t 0 [expr $sep - 1]] +} + if {[set $_CHIPNAME.DUAL_CORE]} { $_CHIPNAME.cpu1 configure -event examine-end { - # get _CHIPNAME from the current target - set _CHIPNAME [regsub ".cpu\\d$" [target current] ""] + set _CHIPNAME [stm32h7x_chipname] global $_CHIPNAME.USE_CTI # Stop watchdog counters during halt @@ -212,8 +221,7 @@ proc stm32h7x_mmw {used_target reg setbits clearbits} { proc stm32h7x_dbgmcu_mmw {reg_offset setbits clearbits} { # use $_CHIPNAME.ap2 if possible, and use the proper dbgmcu base address if {![using_hla]} { - # get _CHIPNAME from the current target - set _CHIPNAME [regsub ".(cpu|ap)\\d*$" [target current] ""] + set _CHIPNAME [stm32h7x_chipname] set used_target $_CHIPNAME.ap2 set reg_addr [expr 0xE00E1000 + $reg_offset] } { @@ -236,8 +244,7 @@ if {[set $_CHIPNAME.USE_CTI]} { $_CHIPNAME.cpu1 configure -event debug-halted { stm32h7x_cti_prepare_restart_all } proc stm32h7x_cti_start {} { - # get _CHIPNAME from the current target - set _CHIPNAME [regsub ".cpu\\d$" [target current] ""] + set _CHIPNAME [stm32h7x_chipname] # Configure Cores' CTIs to halt each other # TRIGIN0 (DBGTRIGGER) and TRIGOUT0 (EDBGRQ) at CTM_CHANNEL_0 @@ -252,8 +259,7 @@ if {[set $_CHIPNAME.USE_CTI]} { } proc stm32h7x_cti_stop {} { - # get _CHIPNAME from the current target - set _CHIPNAME [regsub ".cpu\\d$" [target current] ""] + set _CHIPNAME [stm32h7x_chipname] $_CHIPNAME.cti0 enable off $_CHIPNAME.cti1 enable off @@ -265,8 +271,7 @@ if {[set $_CHIPNAME.USE_CTI]} { } proc stm32h7x_cti_prepare_restart {cti} { - # get _CHIPNAME from the current target - set _CHIPNAME [regsub ".cpu\\d$" [target current] ""] + set _CHIPNAME [stm32h7x_chipname] # Acknowlodge EDBGRQ at TRIGOUT0 $_CHIPNAME.$cti write INACK 0x01 -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
