This is an automated email from Gerrit. Antonio Borneo ([email protected]) just uploaded a new patch set to Gerrit, which you can find at http://openocd.zylin.com/5873
-- gerrit commit 3bf978d9a2d6fcd09514361dddfdb60b08b85a9c Author: Antonio Borneo <[email protected]> Date: Wed Oct 21 16:12:27 2020 +0200 cortex_m: use the new enum ARMV7M_REGSEL_name Register xPSR is indexed directly with its value 16 or with the incorrect enum ARMV7M_xPSR. Replace them with the new enum ARMV7M_REGSEL_xPSR. Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b Signed-off-by: Antonio Borneo <[email protected]> diff --git a/src/flash/nor/psoc6.c b/src/flash/nor/psoc6.c index df151c1..0bcb641 100644 --- a/src/flash/nor/psoc6.c +++ b/src/flash/nor/psoc6.c @@ -153,7 +153,7 @@ static int sromalgo_prepare(struct target *target) /* Restore THUMB bit in xPSR register */ const struct armv7m_common *cm = target_to_armv7m(target); - hr = cm->store_core_reg_u32(target, ARMV7M_xPSR, 0x01000000); + hr = cm->store_core_reg_u32(target, ARMV7M_REGSEL_xPSR, 0x01000000); if (hr != ERROR_OK) return hr; diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 89dbef5..fa22e2e 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -530,7 +530,7 @@ static int cortex_m_debug_entry(struct target *target) /* For IT instructions xPSR must be reloaded on resume and clear on debug exec */ if (xPSR & 0xf00) { r->dirty = r->valid; - cortex_m_store_core_reg_u32(target, 16, xPSR & ~0xff); + cortex_m_store_core_reg_u32(target, ARMV7M_REGSEL_xPSR, xPSR & ~0xff); } /* Are we in an exception handler */ -- _______________________________________________ OpenOCD-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/openocd-devel
