This is an automated email from Gerrit.
Tarek BOCHKATI (tarek.bouchk...@gmail.com) just uploaded a new patch set to
Gerrit, which you can find at http://openocd.zylin.com/5940
-- gerrit
commit 0fb5c803c2fcd01e3fddbea2dc39699bba77cf4e
Author: Tarek BOCHKATI <tarek.bouchk...@st.com>
Date: Fri Nov 20 20:25:38 2020 +0100
flash/nor/sfdp: fix build issue with clang on mac OS
Change-Id: I3b3aa4236125523ad65fd615ada0f5647d26f526
Signed-off-by: Tarek BOCHKATI <tarek.bouchk...@st.com>
diff --git a/src/flash/nor/sfdp.c b/src/flash/nor/sfdp.c
index 2fbc37d..fb98618 100644
--- a/src/flash/nor/sfdp.c
+++ b/src/flash/nor/sfdp.c
@@ -91,7 +91,7 @@ int spi_sfdp(struct flash_bank *bank, struct flash_device
*dev,
}
if (((header.revision >> 24) & 0xFF) != SFDP_ACCESS_PROT) {
LOG_ERROR("access protocol 0x%02" PRIx8 " not implemented",
- (header.revision >> 24) & 0xFF);
+ (uint8_t) (header.revision >> 24));
return ERROR_FLASH_BANK_NOT_PROBED;
}
diff --git a/src/flash/nor/stmqspi.c b/src/flash/nor/stmqspi.c
index 11529f4..85b7cb1 100644
--- a/src/flash/nor/stmqspi.c
+++ b/src/flash/nor/stmqspi.c
@@ -456,7 +456,7 @@ static int qspi_write_enable(struct flash_bank *bank)
!= BIT(SPI_FSEL_FLASH))
if ((status & (SPIFLASH_WE_BIT | SPIFLASH_BSY_BIT)) !=
SPIFLASH_WE_BIT) {
LOG_ERROR("Cannot write enable flash1. Status=0x%02"
PRIx8,
- status & 0xFF);
+ (uint8_t) status);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -465,7 +465,7 @@ static int qspi_write_enable(struct flash_bank *bank)
if ((stmqspi_info->saved_cr & (BIT(SPI_DUAL_FLASH) |
BIT(SPI_FSEL_FLASH))) != 0)
if ((status & (SPIFLASH_WE_BIT | SPIFLASH_BSY_BIT)) !=
SPIFLASH_WE_BIT) {
LOG_ERROR("Cannot write enable flash2. Status=0x%02"
PRIx8,
- status & 0xFF);
+ (uint8_t) status);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -549,7 +549,7 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command)
!= BIT(SPI_FSEL_FLASH)) && ((status & SPIFLASH_BSY_BIT) == 0) &&
((status & SPIFLASH_WE_BIT) != 0)) {
LOG_ERROR("Mass erase command not accepted by flash1.
Status=0x%02" PRIx8,
- status & 0xFF);
+ (uint8_t) status);
retval = ERROR_FLASH_OPERATION_FAILED;
goto err;
}
@@ -560,7 +560,7 @@ COMMAND_HANDLER(stmqspi_handle_mass_erase_command)
((status & SPIFLASH_BSY_BIT) == 0) &&
((status & SPIFLASH_WE_BIT) != 0)) {
LOG_ERROR("Mass erase command not accepted by flash2.
Status=0x%02" PRIx8,
- status & 0xFF);
+ (uint8_t) status);
retval = ERROR_FLASH_OPERATION_FAILED;
goto err;
}
@@ -960,7 +960,7 @@ static int qspi_erase_sector(struct flash_bank *bank,
unsigned int sector)
!= BIT(SPI_FSEL_FLASH)) && ((status & SPIFLASH_BSY_BIT) == 0) &&
((status & SPIFLASH_WE_BIT) != 0)) {
LOG_ERROR("Sector erase command not accepted by flash1.
Status=0x%02" PRIx8,
- status & 0xFF);
+ (uint8_t) status);
retval = ERROR_FLASH_OPERATION_FAILED;
goto err;
}
@@ -972,7 +972,7 @@ static int qspi_erase_sector(struct flash_bank *bank,
unsigned int sector)
((status & SPIFLASH_BSY_BIT) == 0) &&
((status & SPIFLASH_WE_BIT) != 0)) {
LOG_ERROR("Sector erase command not accepted by flash2.
Status=0x%02" PRIx8,
- status & 0xFF);
+ (uint8_t) status);
retval = ERROR_FLASH_OPERATION_FAILED;
goto err;
}
@@ -1214,7 +1214,7 @@ static int stmqspi_blank_check(struct flash_bank *bank)
/* we need le_32_to_h, but that's the same as
h_to_le_32 */
result = h_to_le_32(erase_check_info.result);
bank->sectors[sector + index].is_erased = ((result &
0xFF) == 0xFF);
- LOG_DEBUG("Flash sector %u checked: 0x%04" PRIx16,
sector + index, result & 0xFFFF);
+ LOG_DEBUG("Flash sector %u checked: 0x%04" PRIx16,
sector + index, (uint16_t) result);
}
keep_alive();
sector += count;
--
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