Hello, Below is a patch to allow support for NXP S32G (Cortex M7 cores).
The change is quite simple: as per Arm Debug Interface Architecture Specification (ADIv5.0 to ADIv5.2), B3.3.1, the JTAG-DP as an IR length of 4 or 8 bits depending on the ARM implementation. The current code only support 4-bit and this patch extends the support to 8-bit IR. I suppose 4-bit will still work as the MSB bits will just be discarded, however, it was *not* tested on a 4-bit target. Also, I had some difficulties to configure the right MEM-AP to use. The problem is that the doc gives a command 'dap apsel N' which seems broken, and the option working for me is '-ap-num N' (for 'target create'), which is not documented! Maybe some cleanup here would be useful. Best regards, Antoine --- diff --git a/src/target/adi_v5_jtag.c b/src/target/adi_v5_jtag.c index 239253d20..38292c069 100644 --- a/src/target/adi_v5_jtag.c +++ b/src/target/adi_v5_jtag.c @@ -43,10 +43,10 @@ /*#define DEBUG_WAIT*/ /* JTAG instructions/registers for JTAG-DP and SWJ-DP */ -#define JTAG_DP_ABORT 0x8 -#define JTAG_DP_DPACC 0xA -#define JTAG_DP_APACC 0xB -#define JTAG_DP_IDCODE 0xE +#define JTAG_DP_ABORT 0xF8 +#define JTAG_DP_DPACC 0xFA +#define JTAG_DP_APACC 0xFB +#define JTAG_DP_IDCODE 0xFE /* three-bit ACK values for DPACC and APACC reads */ #define JTAG_ACK_OK_FAULT 0x2
