This is an automated email from Gerrit.
"Dietmar May <dietmar....@outlook.com>" just uploaded a new patch set to
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6472
-- gerrit
commit 7cabfcb86851345b8caae2d2fa054630b1b2b9b4
Author: Dietmar May <dietmar....@outlook.com>
Date: Thu Aug 19 10:57:10 2021 -0400
aarch64: trace register read & write.
Adds trace logging messages for actual direct register read and write,
ie. physical access vs. cache. This is useful for debugging init
scripts, as well as following OpenOCD interaction with the target
registers.
Trace: WRITE: ca53.0:x0, 00000010
Signed-off-by: Dietmar May <dietmar....@outlook.com>
Change-Id: Idc3e3b79820654a9c2098043931593beac4eeec2
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 188e58822..715079e97 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -662,9 +662,9 @@ static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg
*r, unsigned regnum)
r->dirty = false;
buf_set_u64(r->value, 0, r->size, value_64);
if (r->size == 64)
- LOG_DEBUG("READ: %s, %16.8llx", r->name,
(unsigned long long) value_64);
+ LOG_TRACE("READ: %s:%s, %16.8llx",
dpm->arm->target->cmd_name, r->name, (unsigned long long) value_64);
else
- LOG_DEBUG("READ: %s, %8.8x", r->name, (unsigned
int) value_64);
+ LOG_TRACE("READ: %s:%s, %8.8x",
dpm->arm->target->cmd_name, r->name, (unsigned int) value_64);
}
} else if (r->size <= 128) {
uint64_t lvalue = 0, hvalue = 0;
@@ -677,13 +677,13 @@ static int dpmv8_read_reg(struct arm_dpm *dpm, struct reg
*r, unsigned regnum)
buf_set_u64(r->value, 0, 64, lvalue);
buf_set_u64(r->value + 8, 0, r->size - 64, hvalue);
- LOG_DEBUG("READ: %s, lvalue=%16.8llx", r->name,
(unsigned long long) lvalue);
- LOG_DEBUG("READ: %s, hvalue=%16.8llx", r->name,
(unsigned long long) hvalue);
+ LOG_TRACE("READ: %s:%s, lvalue=%16.8llx",
dpm->arm->target->cmd_name, r->name, (unsigned long long) lvalue);
+ LOG_TRACE("READ: %s:%s, hvalue=%16.8llx",
dpm->arm->target->cmd_name, r->name, (unsigned long long) hvalue);
}
}
if (retval != ERROR_OK)
- LOG_ERROR("Failed to read %s register", r->name);
+ LOG_ERROR("Failed to read %s:%s register",
dpm->arm->target->cmd_name, r->name);
return retval;
}
@@ -705,9 +705,9 @@ static int dpmv8_write_reg(struct arm_dpm *dpm, struct reg
*r, unsigned regnum)
if (retval == ERROR_OK) {
r->dirty = false;
if (r->size == 64)
- LOG_DEBUG("WRITE: %s, %16.8llx", r->name,
(unsigned long long)value_64);
+ LOG_TRACE("WRITE: %s:%s, %16.8llx",
dpm->arm->target->cmd_name, r->name, (unsigned long long)value_64);
else
- LOG_DEBUG("WRITE: %s, %8.8x", r->name,
(unsigned int)value_64);
+ LOG_TRACE("WRITE: %s:%s, %8.8x",
dpm->arm->target->cmd_name, r->name, (unsigned int)value_64);
}
} else if (r->size <= 128) {
uint64_t lvalue, hvalue;
@@ -719,13 +719,13 @@ static int dpmv8_write_reg(struct arm_dpm *dpm, struct
reg *r, unsigned regnum)
if (retval == ERROR_OK) {
r->dirty = false;
- LOG_DEBUG("WRITE: %s, lvalue=%16.8llx", r->name,
(unsigned long long) lvalue);
- LOG_DEBUG("WRITE: %s, hvalue=%16.8llx", r->name,
(unsigned long long) hvalue);
+ LOG_TRACE("WRITE: %s:%s, lvalue=%16.8llx",
dpm->arm->target->cmd_name, r->name, (unsigned long long) lvalue);
+ LOG_TRACE("WRITE: %s:%s, hvalue=%16.8llx",
dpm->arm->target->cmd_name, r->name, (unsigned long long) hvalue);
}
}
if (retval != ERROR_OK)
- LOG_ERROR("Failed to write %s register", r->name);
+ LOG_ERROR("Failed to write %s:%s register",
dpm->arm->target->cmd_name, r->name);
return retval;
}
--
