Hi Tarek,
I've built patched version of openocd, but I was unable to flash MCU in any 
configuration. Probably due to different issue. Page size detection seems to be 
correct. At least according to output of  "flash info 0".
(Initial report was done on older openocd release 
https://github.com/xpack-dev-tools/openocd-xpack/releases/tag/v0.11.0-1)

Configuration:
STlink V2-1 (NUCLEO-L552ZE-Q), (STlink V2 clone with same results)
MCU STM32L552RCT6 on separate board, external (stable) power supply

Please see following logs:

OpenOCD output:
~~~
./openocd -f ~/openocd.cfg -s ../tcl  -c "init; reset halt; adapter speed 2000"
Open On-Chip Debugger 0.11.0+dev-00376-g3a73b22cd (2021-09-04-10:33)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results 
might differ compared to plain JTAG/SWD
Info : DEPRECATED target event trace-config
adapter speed: 1800 kHz

Info : clock speed 1800 kHz
Info : STLINK V2J34M25 (API v2) VID:PID 0483:374B
Info : Target voltage: 3.264253
Info : stm32l5x.cpu: hardware has 8 breakpoints, 4 watchpoints
Info : starting gdb server for stm32l5x.cpu on 3333
Info : Listening on port 3333 for gdb connections
stm32l5x.dap
Error executing event halted on target stm32l5x.cpu:
../tcl/target/stm32l5x.cfg:116: Error: 
in procedure 'ocd_process_reset' 
in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", 
line 788
in procedure 'ahb_ap_non_secure_access' called at file 
"../tcl/target/stm32l5x.cfg", line 152
at file "../tcl/target/stm32l5x.cfg", line 116
target halted due to debug-request, current mode: Thread 
xPSR: 0xf9000000 pc: 0xfffffffe msp: 0xfffffffc
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
Info : Unable to match requested speed 2000 kHz, using 1800 kHz
adapter speed: 1800 kHz

Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : accepting 'telnet' connection on tcp/4444
Info : device idcode = 0x20016472 (STM32L55/L56xx - Rev 'unknown' : 0x2001)
Info : TZEN = 0 : TrustZone disabled by option bytes
Info : RDP level 0 (0xAA)
Info : flash size = 256kbytes
Info : flash mode : single-bank
Error: timeout waiting for algorithm, a target reset is recommended
Error: error executing stm32l4 flash write algorithm
Error: block write failed
Error: error writing to flash at address 0x08000000 at offset 0x00000000
~~~

Telnet commands:
~~~
telnet localhost 4444
Trying ::1...
Connection failed: Connection refused
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> flash write_image /home/diggit/dev/blob.hex
device idcode = 0x20016472 (STM32L55/L56xx - Rev 'unknown' : 0x2001)
TZEN = 0 : TrustZone disabled by option bytes
RDP level 0 (0xAA)
flash size = 256kbytes
flash mode : single-bank
timeout waiting for algorithm, a target reset is recommended
error executing stm32l4 flash write algorithm
block write failed
error writing to flash at address 0x08000000 at offset 0x00000000
>
~~~

Could it be, due to HLA SWD only probe?


---

** [tickets:#317] STM32L5 wrong page size**

**Status:** new
**Milestone:** 0.11.0
**Labels:** stm32lx flash 
**Created:** Wed Aug 25, 2021 02:33 PM UTC by Patrik Bachan
**Last Updated:** Thu Sep 02, 2021 09:11 PM UTC
**Owner:** nobody


Hi,
I have issue with OpenOCD and STM32L552 (256 kiB FLASH).
STM32L5x has 2 option bytes telling what dual-bank config is used: DBANK and 
DB256K.
Issues it, that page size depends only on DBANK, even for devices with 256kiB.
Tested with STM32CUbeProgrammer and STM32L552. Also tested with OpenOCD which 
erases only 2kiB, even though OpenOCD reports 4kiB pages.
In commit 
[092cfe16fb9cf6d6a308d62246fb648b0709ecd3](https://review.openocd.org/gitweb?p=openocd.git;a=commitdiff;h=092cfe16fb9cf6d6a308d62246fb648b0709ecd3)
 introducing support of L5 devices, there seems to be the culprit of issue.

```
if ((use_dbank_bit && (options & BIT(22))) ||
                      (!use_dbank_bit && (options & BIT(21)))) {
```

STM32 flash driver code for these MCUs decides by DBANK for 512 kiB and by 
DB256K for 256 kiB and this is  not correct.

>From my understanding and observations:
for 512 kiB devices, DBANK affects page size and single-bank/dual-bank selection
for 256 kiB devices, DBANK affects page size and DB256K affects 
single-bank/dual-bank selection (probably, not tested)

This issue causes flash programming fail when there is already something in 
flash and page needs to be erased at first. I assume, that problem is wrong 
page erasure.

On which devices was this code tested?


---

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