[PATCH]: ca93d8122 topic: Adding Nuvoton NPCX patch for arm_adi_v5.c

[gerrit]

This is an automated email from Gerrit.

"Ben Bender <benjben...@gmail.com>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/6631

-- gerrit

commit ca93d8122aba0fcb92dee0ffa0753c314a01e7ee
Author: Ben Bender <benjben...@gmail.com>
Date:   Tue Oct 5 13:32:03 2021 +0300

    topic: Adding Nuvoton NPCX patch for arm_adi_v5.c
    
    We found that the NPCX has an issue with the byte lanes so that non byte 
aligned writes aren't working. To overcome this, for byte accesses we copy the 
byte to be written to all of the byte lanes.
    
    Signed-off-by: benjbender <benjben...@gmail.com>
    Change-Id: I58fe02bf121cab02995f42678b21878fd605ec21

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 3c3403e11..7a5f608df 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -420,9 +420,8 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t 
*buffer, uint32_t siz
                                outvalue |= (uint32_t)*buffer++ << 8 * (0 ^ 
(drw_byte_idx & 3) ^ addr_xor);
                                break;
                        }
-               } else if(dap->nu_npcx_quirks) {
-                       switch (this_size)
-                       {
+               } else if (dap->nu_npcx_quirks) {
+                       switch (this_size) {
                        case 4:
                                outvalue |= (uint32_t)*buffer++ << 8 * 
(drw_byte_idx++ & 3);
                                outvalue |= (uint32_t)*buffer++ << 8 * 
(drw_byte_idx++ & 3);

--