This is an automated email from Gerrit. "Tomas Vanek <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6676
-- gerrit commit 996a54fae6c4568d5896a6f5356e7d2e2c940635 Author: Tomas Vanek <[email protected]> Date: Mon Nov 8 14:24:33 2021 +0100 cortex_m: use cortex_m_write_debug_halt_mask() in cortex_m_single_step_core() cortex_m_single_step_core() used mem_ap_write_atomic_u32() to manipulate dhcsr bits unlike the rest of code, where a specialized function cortex_m_write_debug_halt_mask() takes place. Unify setting of dhcsr bits and use cortex_m_write_debug_halt_mask() here as well. Extracted from [1]. [1] Antonio Borneo: 6207: cortex_m: rework handling of dcb_dhcsr Link: https://review.openocd.org/c/openocd/+/6207 Change-Id: I9ef05ce88a9dce42e1d3d5404a4fe87ec86b5fe8 Signed-off-by: Tomas Vanek <[email protected]> diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 3412c5677..f68260603 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -301,7 +301,6 @@ static int cortex_m_clear_halt(struct target *target) static int cortex_m_single_step_core(struct target *target) { struct cortex_m_common *cortex_m = target_to_cm(target); - struct armv7m_common *armv7m = &cortex_m->armv7m; int retval; /* Mask interrupts before clearing halt, if not done already. This avoids @@ -309,13 +308,11 @@ static int cortex_m_single_step_core(struct target *target) * HALT can put the core into an unknown state. */ if (!(cortex_m->dcb_dhcsr & C_MASKINTS)) { - retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DHCSR, - DBGKEY | C_MASKINTS | C_HALT | C_DEBUGEN); + retval = cortex_m_write_debug_halt_mask(target, C_MASKINTS, 0); if (retval != ERROR_OK) return retval; } - retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DHCSR, - DBGKEY | C_MASKINTS | C_STEP | C_DEBUGEN); + retval = cortex_m_write_debug_halt_mask(target, C_STEP, C_HALT); if (retval != ERROR_OK) return retval; LOG_DEBUG(" "); --
