This is an automated email from Gerrit.
"Antonio Borneo <borneo.anto...@gmail.com>" just uploaded a new patch set to
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6724
-- gerrit
commit db463b2b70b8804cecb2d750bc1df561849b312a
Author: Antonio Borneo <borneo.anto...@gmail.com>
Date: Thu Nov 18 12:26:26 2021 +0100
doc: riscv: fix command available only at config time
Commands "riscv expose_csrs" and "riscv expose_custom" are only
available at config time.
Tag them as {Config Command}.
Change-Id: Ie86821cf5d0bbbd73112b4f54e7d00035fce1220
Signed-off-by: Antonio Borneo <borneo.anto...@gmail.com>
Fixes: a51ab8ddf63a ("Add RISC-V support.")
Fixes: bc72695f6738 ("Lots of RISC-V improvements.")
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 6ace83e56..59397f46c 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -10144,7 +10144,7 @@ OpenOCD exposes each hart as a separate core.
@subsection RISC-V Debug Configuration Commands
-@deffn {Command} {riscv expose_csrs} n0[-m0][,n1[-m1]]...
+@deffn {Config Command} {riscv expose_csrs} n0[-m0][,n1[-m1]]...
Configure a list of inclusive ranges for CSRs to expose in addition to the
standard ones. This must be executed before `init`.
@@ -10154,7 +10154,7 @@ command can be used if OpenOCD gets this wrong, or a
target implements custom
CSRs.
@end deffn
-@deffn {Command} {riscv expose_custom} n0[-m0][,n1[-m1]]...
+@deffn {Config Command} {riscv expose_custom} n0[-m0][,n1[-m1]]...
The RISC-V Debug Specification allows targets to expose custom registers
through abstract commands. (See Section 3.5.1.1 in that document.) This command
configures a list of inclusive ranges of those registers to expose. Number 0
--
