This is an automated email from Gerrit. "Julien Massot <julien.mas...@iot.bzh>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6807
-- gerrit commit 6ec8c9709448a8d5e7fc868124fae6fc07273b41 Author: Julien Massot <julien.mas...@iot.bzh> Date: Wed Jan 12 14:10:36 2022 +0100 target:armv8: aarch32 do not try to restore same EL While debugging a Cortex-R52 OpenOCD fail to restore context on line retval = dpm->instr_write_data_r0(dpm, ARMV8_MSR_GP_xPSR_T1(1, 0, 15), cpsr); which trigger this exception: aarch64.c:1206 aarch64_restore_context(): r8a779a0.r52 armv8_dpm.c:560 armv8_dpm_modeswitch(): restoring mode, cpsr = 0x0000011f 1262753 armv8_dpm.c:598 armv8_dpm_modeswitch(): target_el = 1, last_el = 1 armv8_dpm.c:611 armv8_dpm_modeswitch(): SPSR = 0x0000011f armv8_dpm.c:260 dpmv8_exec_opcode(): Opcode 0x8f00f390, DSCR.ERR=1, DSCR.EL=1 and finally OpenOCD doesn't succeed to restore the processor. This check 'dpm->last_el != target_el' exist for aarch64, so might be correct for aarch32 too. Signed-off-by: Julien Massot <julien.mas...@iot.bzh> Change-Id: I41d1006233251dcaf6d69bda580488b204b7eb63 diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index 188e58822..a684be7b9 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -606,7 +606,7 @@ int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode) core_state = armv8_dpm_get_core_state(dpm); if (core_state != ARM_STATE_AARCH64) { /* cannot do DRPS/ERET when already in EL0 */ - if (dpm->last_el != 0) { + if (dpm->last_el != 0 && dpm->last_el != target_el) { /* load SPSR with the desired mode and execute DRPS */ LOG_DEBUG("SPSR = 0x%08"PRIx32, cpsr); retval = dpm->instr_write_data_r0(dpm, --