This is an automated email from Gerrit.
"Name of user not set <sean.ander...@seco.com>" just uploaded a new patch set
to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6849
-- gerrit
commit b9519d387ef7b65e2ee365af6b1885cbb8e3f453
Author: Sean Anderson <sean.ander...@seco.com>
Date: Fri Feb 11 17:50:09 2022 -0500
board: Add NXP LS1088ARDB
This adds a board file for the NXP LS1088ARDB. This only covers the
"primary" JTAG header J55, and not the PCIe header (J91). The only
oddity is that the LS1088A and CPLD are muxed by adding/removing a
jumper from J45. Unfortunately, it doesn't look like OpenOCD supports
this CPLD beyond determining the irlen, so it's not very useful. Those
who are interested in experimenting can define CWTAP to access the CPLD,
but the default is to access the CPU.
Signed-off-by: Sean Anderson <sean.ander...@seco.com>
Change-Id: Ia07436a534f86bd907aa5fe2a78a326a27855a24
diff --git a/tcl/board/nxp_rdb-ls1088a.cfg b/tcl/board/nxp_rdb-ls1088a.cfg
new file mode 100644
index 000000000..1f94b3041
--- /dev/null
+++ b/tcl/board/nxp_rdb-ls1088a.cfg
@@ -0,0 +1,12 @@
+# NXP LS1088ARDB (Reference Design Board)
+
+transport select jtag
+reset_config srst_only
+
+# To access the CPLD, populate J45 and add `-c 'set CWTAP 1'` to your command
+# line. At the time of this writing, programming is unsupported.
+if { [info exists CWTAP] } {
+ source [find cpld/altera-epm240.cfg]
+} else {
+ source [find target/ls1088a.cfg]
+}
--
