This is an automated email from Gerrit.

"Tarek BOCHKATI <tarek.bouchk...@gmail.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6875

-- gerrit

commit 5c26eaa05b9e7e1089099022ef6c7a359993453a
Author: Tarek BOCHKATI <tarek.bouchk...@gmail.com>
Date:   Fri Dec 3 13:16:50 2021 +0100

    flash/stm32l4x: support STM32U59/U5Ax devices
    
    STM32U59/U5Ax devices are similar to U57/U58x devices
    with 2 flash banks up to 2 MB each
    
    Change-Id: I7e5c1700acf8c9fda34f660c9274bfd8bcb1381b
    Signed-off-by: Tarek BOCHKATI <tarek.bouchk...@gmail.com>

diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index f9595427f5..7c203aa84e 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -128,6 +128,15 @@
  * http://www.st.com/resource/en/reference_manual/dm00346336.pdf
  */
 
+/* STM32U5xxx series for reference.
+ *
+ * RM0456 (STM32U575/U585)
+ * http://www.st.com/resource/en/reference_manual/dm00477635.pdf
+ *
+ * RM0476 (STM32U59x/U5Ax)
+ * http://www.st.com/resource/en/reference_manual/dm00684413.pdf
+ */
+
 /* Erase time can be as high as 25ms, 10x this and assume it's toast... */
 
 #define FLASH_ERASE_TIMEOUT 250
@@ -351,10 +360,14 @@ static const struct stm32l4_rev stm32g49_g4axx_revs[] = {
        { 0x1000, "A" },
 };
 
-static const struct stm32l4_rev stm32u57_u58xx_revs[] = {
+static const struct stm32l4_rev stm32u59_u5axx_revs[] = {
        { 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2000, "B" },
 };
 
+static const struct stm32l4_rev stm32u57_u58xx_revs[] = {
+       { 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2000, "B" }, { 
0x2001, "X" },
+};
+
 static const struct stm32l4_rev stm32wb1xx_revs[] = {
        { 0x1000, "A" }, { 0x2000, "B" },
 };
@@ -576,6 +589,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
          .otp_base              = 0x1FFF7000,
          .otp_size              = 1024,
        },
+       {
+         .id                    = DEVID_STM32U59_U5AXX,
+         .revs                  = stm32u59_u5axx_revs,
+         .num_revs              = ARRAY_SIZE(stm32u59_u5axx_revs),
+         .device_str            = "STM32U59/U5Axx",
+         .max_flash_size_kb     = 4096,
+         .flags                 = F_HAS_DUAL_BANK | F_QUAD_WORD_PROG | 
F_HAS_TZ | F_HAS_L5_FLASH_REGS,
+         .flash_regs_base       = 0x40022000,
+         .fsize_addr            = 0x0BFA07A0,
+         .otp_base              = 0x0BFA0000,
+         .otp_size              = 512,
+       },
        {
          .id                    = DEVID_STM32U57_U58XX,
          .revs                  = stm32u57_u58xx_revs,
@@ -1993,14 +2018,15 @@ static int stm32l4_probe(struct flash_bank *bank)
                        stm32l4_info->bank1_sectors = num_pages / 2;
                }
                break;
+       case DEVID_STM32U59_U5AXX:
        case DEVID_STM32U57_U58XX:
-               /* if flash size is max (2M) the device is always dual bank
-                * otherwise check DUALBANK
+               /* if flash size is more than 1M the device is always dual bank
+                * otherwise check DUALBANK bit
                 */
                page_size_kb = 8;
                num_pages = flash_size_kb / page_size_kb;
                stm32l4_info->bank1_sectors = num_pages;
-               if (is_max_flash_size || (stm32l4_info->optr & 
FLASH_U5_DUALBANK)) {
+               if (flash_size_kb > 1024 || (stm32l4_info->optr & 
FLASH_U5_DUALBANK)) {
                        stm32l4_info->dual_bank_mode = true;
                        stm32l4_info->bank1_sectors = num_pages / 2;
                }
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index c249d7fa84..89d409c4e1 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -113,6 +113,7 @@
 #define DEVID_STM32L4P_L4QXX   0x471
 #define DEVID_STM32L55_L56XX   0x472
 #define DEVID_STM32G49_G4AXX   0x479
+#define DEVID_STM32U59_U5AXX   0x481
 #define DEVID_STM32U57_U58XX   0x482
 #define DEVID_STM32WB1XX               0x494
 #define DEVID_STM32WB5XX               0x495

-- 

Reply via email to