This is an automated email from Gerrit.
"Antonio Borneo <borneo.anto...@gmail.com>" just uploaded a new patch set to
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/6945
-- gerrit
commit b05c18be40bd62a823b21fc8f6dfa9dc0214e2ad
Author: Antonio Borneo <borneo.anto...@gmail.com>
Date: Sat Apr 23 16:14:15 2022 +0200
tcl/target: stm32[fl]4x: document the settings for trace
While reviewing on gerrit the change
https://review.openocd.org/6932/
it get clear that the missing documentation on stm32f4x's code
was triggering errors in the new change.
OpenOCD is currently unable to read traces, but these can be
hopefully be read with some other tool.
Document the settings for enabling trace on stm32[fl]4x.
Change-Id: Ibae77a53de16375d3d500e728678740095547009
Signed-off-by: Antonio Borneo <borneo.anto...@gmail.com>
diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg
index c0be9ea0e8..349c90407f 100644
--- a/tcl/target/stm32f4x.cfg
+++ b/tcl/target/stm32f4x.cfg
@@ -98,18 +98,21 @@ proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
if { [$_chipname.tpiu cget -protocol] eq "sync" } {
switch [$_chipname.tpiu cget -port-width] {
1 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 1 bit;
GPIOE[2-3] to AF0
mmw 0xE0042004 0x00000060 0x000000c0
mmw 0x40021020 0x00000000 0x0000ff00
mmw 0x40021000 0x000000a0 0x000000f0
mmw 0x40021008 0x000000f0 0x00000000
}
2 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 2 bit;
GPIOE[2-4] to AF0
mmw 0xE0042004 0x000000a0 0x000000c0
mmw 0x40021020 0x00000000 0x000fff00
mmw 0x40021000 0x000002a0 0x000003f0
mmw 0x40021008 0x000003f0 0x00000000
}
4 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 4 bit;
GPIOE[2-6] to AF0
mmw 0xE0042004 0x000000e0 0x000000c0
mmw 0x40021020 0x00000000 0x0fffff00
mmw 0x40021000 0x00002aa0 0x00003ff0
@@ -117,6 +120,7 @@ proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
}
}
} else {
+ # Set TRACE_IOEN; TRACE_MODE to async
mmw 0xE0042004 0x00000020 0x000000c0
}
}
diff --git a/tcl/target/stm32l4x.cfg b/tcl/target/stm32l4x.cfg
index 89088a788b..a9e77859e9 100644
--- a/tcl/target/stm32l4x.cfg
+++ b/tcl/target/stm32l4x.cfg
@@ -108,18 +108,21 @@ proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
if { [$_chipname.tpiu cget -protocol] eq "sync" } {
switch [$_chipname.tpiu cget -port-width] {
1 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 1 bit;
GPIOE[2-3] to AF0
mmw 0xE0042004 0x00000060 0x000000c0
mmw 0x48001020 0x00000000 0x0000ff00
mmw 0x48001000 0x000000a0 0x000000f0
mmw 0x48001008 0x000000f0 0x00000000
}
2 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 2 bit;
GPIOE[2-4] to AF0
mmw 0xE0042004 0x000000a0 0x000000c0
mmw 0x48001020 0x00000000 0x000fff00
mmw 0x48001000 0x000002a0 0x000003f0
mmw 0x48001008 0x000003f0 0x00000000
}
4 {
+ # Set TRACE_IOEN; TRACE_MODE to sync 4 bit;
GPIOE[2-6] to AF0
mmw 0xE0042004 0x000000e0 0x000000c0
mmw 0x48001020 0x00000000 0x0fffff00
mmw 0x48001000 0x00002aa0 0x00003ff0
@@ -127,6 +130,7 @@ proc _proc_pre_enable_$_CHIPNAME.tpiu {_chipname} {
}
}
} else {
+ # Set TRACE_IOEN; TRACE_MODE to async
mmw 0xE0042004 0x00000020 0x000000c0
}
}
--
