Hi Ian, For me, 2 hardware breakpoints in ESP32 are the most irritating thing. It makes debugging annoying and time-consuming.
Regards Piotr On Tue, 26 Apr 2022 at 02:46, Ian Thompson <ia...@cadence.com> wrote: > Hello, > > > > Over recent months, we here at Cadence/Tensilica have been adding support > for Xtensa processors into OpenOCD. We have a functional port publicly > available via Github, at https://github.com/foss-xtensa/openocd, based > off OpenOCD v0.11.0. Xtensa processors are highly configurable, with many > different features and architectural options available to our customers. > This branch has been tested on a couple of dozen different Xtensa > configurations, using multiple controllers, over different debug > transports, on real silicon as well as in simulation/emulation/FPGA, etc. > > > > Our Xtensa port is based on the fantastic Espressif Xtensa solution, which > is currently under review for inclusion in main-line OpenOCD. However, > Espressif’s popular silicon solutions implement a smaller subset of Xtensa > options. We look forward to working with Espressif and the OpenOCD > community to ultimately provide a solution that supports all Xtensa users, > and would welcome any input/suggestions on how to best achieve this. > > > > Thanks and regards, > > Ian Thompson > > > > [image: CadenceLogoRed185Regcopy1583174817new51584636989.png] > <https://www.cadence.com/en_US/home.html> > > > *Ian Thompson *Sr Principal Design Engineer > T: 408.914.6153 > > [image: UIcorrectsize1583179003.png] > <https://www.cadence.com/en_US/home.html> > > [image: 16066EmailSignatureFortune100Best2021White92x1271617625037.png] > <https://www.cadence.com/en_US/home/company/careers.html> > > > > >
