This is an automated email from Gerrit.

"Antonio Borneo <borneo.anto...@gmail.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7030

-- gerrit

commit c8192f8fe2c7b90bf91f54046a51cfd18b2707c2
Author: Antonio Borneo <borneo.anto...@gmail.com>
Date:   Sun Jun 12 23:51:51 2022 +0200

    tcl: add SPDX tag
    
    For historical reasons, no license information was added to the
    tcl files. This makes trivial adding the SPDX tag through script:
            fgrep -rL SPDX tcl | while read a;do \
            sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
            }' $a;done
    
    With no specific license information from the author, let's extend
    the OpenOCD project license GPL-2.0-or-later to the files.
    
    Change-Id: Ief3da306a6e1978de7dfb8f552f9ff23151f9944
    Signed-off-by: Antonio Borneo <borneo.anto...@gmail.com>

diff --git a/tcl/bitsbytes.tcl b/tcl/bitsbytes.tcl
index 756c725df6..03d758e7c8 100644
--- a/tcl/bitsbytes.tcl
+++ b/tcl/bitsbytes.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #----------------------------------------
 # Purpose - Create some $BIT variables
 #           Create $K and $M variables
diff --git a/tcl/chip/atmel/at91/aic.tcl b/tcl/chip/atmel/at91/aic.tcl
index 8b8a48f3b4..6657b601af 100644
--- a/tcl/chip/atmel/at91/aic.tcl
+++ b/tcl/chip/atmel/at91/aic.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set AIC_SMR            [expr {$AT91C_BASE_AIC + 0x00000000} ]
 global AIC_SMR
 set AIC_SVR            [expr {$AT91C_BASE_AIC + 0x00000080} ]
diff --git a/tcl/chip/atmel/at91/at91_pio.cfg b/tcl/chip/atmel/at91/at91_pio.cfg
index 2373c19fe9..10a1d48c68 100644
--- a/tcl/chip/atmel/at91/at91_pio.cfg
+++ b/tcl/chip/atmel/at91/at91_pio.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set PIO_PER    0x00    ;# Enable Register
 set PIO_PDR    0x04    ;# Disable Register
 set PIO_PSR    0x08    ;# Status Register
diff --git a/tcl/chip/atmel/at91/at91_pmc.cfg b/tcl/chip/atmel/at91/at91_pmc.cfg
index dd554ce81e..a75cecd6a1 100644
--- a/tcl/chip/atmel/at91/at91_pmc.cfg
+++ b/tcl/chip/atmel/at91/at91_pmc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set    AT91_PMC_SCER           [expr {$AT91_PMC + 0x00}]       ;# System Clock 
Enable Register
 set    AT91_PMC_SCDR           [expr {$AT91_PMC + 0x04}]       ;# System Clock 
Disable Register
 
diff --git a/tcl/chip/atmel/at91/at91_rstc.cfg 
b/tcl/chip/atmel/at91/at91_rstc.cfg
index 6673fe6452..fd174380a7 100644
--- a/tcl/chip/atmel/at91/at91_rstc.cfg
+++ b/tcl/chip/atmel/at91/at91_rstc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set AT91_RSTC_CR               [expr {$AT91_RSTC + 0x00}]      ;# Reset 
Controller Control Register
 set            AT91_RSTC_PROCRST       [expr {1 << 0}]         ;# Processor 
Reset
 set            AT91_RSTC_PERRST        [expr {1 << 2}]         ;# Peripheral 
Reset
diff --git a/tcl/chip/atmel/at91/at91_wdt.cfg b/tcl/chip/atmel/at91/at91_wdt.cfg
index 9b4e817e29..8bba62e16f 100644
--- a/tcl/chip/atmel/at91/at91_wdt.cfg
+++ b/tcl/chip/atmel/at91/at91_wdt.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set AT91_WDT_CR                [expr {$AT91_WDT + 0x00}]       ;# Watchdog 
Control Register
 set            AT91_WDT_WDRSTT         [expr {1    << 0}]      ;# Restart
 set            AT91_WDT_KEY            [expr {0xa5 << 24}]     ;# KEY Password
diff --git a/tcl/chip/atmel/at91/at91sam7x128.tcl 
b/tcl/chip/atmel/at91/at91sam7x128.tcl
index ce33cf0093..8f468275b8 100644
--- a/tcl/chip/atmel/at91/at91sam7x128.tcl
+++ b/tcl/chip/atmel/at91/at91sam7x128.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 source [find bitsbytes.tcl]
 source [find cpu/arm/arm7tdmi.tcl]
 source [find memory.tcl]
diff --git a/tcl/chip/atmel/at91/at91sam7x256.tcl 
b/tcl/chip/atmel/at91/at91sam7x256.tcl
index dc4918ab17..49d5244cce 100644
--- a/tcl/chip/atmel/at91/at91sam7x256.tcl
+++ b/tcl/chip/atmel/at91/at91sam7x256.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 source [find bitsbytes.tcl]
 source [find cpu/arm/arm7tdmi.tcl]
 source [find memory.tcl]
diff --git a/tcl/chip/atmel/at91/at91sam9261.cfg 
b/tcl/chip/atmel/at91/at91sam9261.cfg
index 61b0c0bf3d..51e7101b5e 100644
--- a/tcl/chip/atmel/at91/at91sam9261.cfg
+++ b/tcl/chip/atmel/at91/at91sam9261.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
 # Peripheral identifiers/interrupts.
 #
diff --git a/tcl/chip/atmel/at91/at91sam9261_matrix.cfg 
b/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
index 238e658414..c3656bd41d 100644
--- a/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
+++ b/tcl/chip/atmel/at91/at91sam9261_matrix.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 set AT91_MATRIX_MCFG   [expr {$AT91_MATRIX + 0x00}]    ;# Master Configuration 
Register #
 set            AT91_MATRIX_RCB0        [expr {1 << 0}]         ;# Remap 
Command for AHB Master 0 (ARM926EJ-S Instruction Master)
diff --git a/tcl/chip/atmel/at91/at91sam9263.cfg 
b/tcl/chip/atmel/at91/at91sam9263.cfg
index 8e22eb2db0..600c548616 100644
--- a/tcl/chip/atmel/at91/at91sam9263.cfg
+++ b/tcl/chip/atmel/at91/at91sam9263.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #
 # Peripheral identifiers/interrupts.
 #
diff --git a/tcl/chip/atmel/at91/at91sam9263_matrix.cfg 
b/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
index b4a07d32df..20a31079a0 100644
--- a/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
+++ b/tcl/chip/atmel/at91/at91sam9263_matrix.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set AT91_MATRIX_MCFG0  [expr {$AT91_MATRIX + 0x00}]    ;# Master Configuration 
Register 0
 set AT91_MATRIX_MCFG1  [expr {$AT91_MATRIX + 0x04}]    ;# Master Configuration 
Register 1
 set AT91_MATRIX_MCFG2  [expr {$AT91_MATRIX + 0x08}]    ;# Master Configuration 
Register 2
diff --git a/tcl/chip/atmel/at91/at91sam9_init.cfg 
b/tcl/chip/atmel/at91/at91sam9_init.cfg
index 27611eb5e6..a64d6eaef1 100644
--- a/tcl/chip/atmel/at91/at91sam9_init.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_init.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 uplevel #0 [list source [find chip/atmel/at91/at91sam9_sdramc.cfg]]
 uplevel #0 [list source [find chip/atmel/at91/at91_pmc.cfg]]
 uplevel #0 [list source [find chip/atmel/at91/at91_pio.cfg]]
diff --git a/tcl/chip/atmel/at91/at91sam9_sdramc.cfg 
b/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
index 7b09369de9..658b6c361a 100644
--- a/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_sdramc.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 # SDRAM Controller (SDRAMC) registers
 set AT91_SDRAMC_MR             [expr {$AT91_SDRAMC + 0x00}]    ;# SDRAM 
Controller Mode Register
diff --git a/tcl/chip/atmel/at91/at91sam9_smc.cfg 
b/tcl/chip/atmel/at91/at91sam9_smc.cfg
index 3a76d147b7..c096c4a2cb 100644
--- a/tcl/chip/atmel/at91/at91sam9_smc.cfg
+++ b/tcl/chip/atmel/at91/at91sam9_smc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set            AT91_SMC_READMODE       [expr {1 <<  0}]                ;# Read 
Mode
 set            AT91_SMC_WRITEMODE      [expr {1 <<  1}]                ;# 
Write Mode
 set            AT91_SMC_EXNWMODE       [expr {3 <<  4}]                ;# 
NWAIT Mode
diff --git a/tcl/chip/atmel/at91/hardware.cfg b/tcl/chip/atmel/at91/hardware.cfg
index a25eab975b..069d4b78c9 100644
--- a/tcl/chip/atmel/at91/hardware.cfg
+++ b/tcl/chip/atmel/at91/hardware.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # External Memory Map
 set AT91_CHIPSELECT_0  0x10000000
 set AT91_CHIPSELECT_1  0x20000000
diff --git a/tcl/chip/atmel/at91/pmc.tcl b/tcl/chip/atmel/at91/pmc.tcl
index 7cb1d093e3..0f997cad54 100644
--- a/tcl/chip/atmel/at91/pmc.tcl
+++ b/tcl/chip/atmel/at91/pmc.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 if [info exists AT91C_MAINOSC_FREQ] {
     # user set this... let it be.
diff --git a/tcl/chip/atmel/at91/rtt.tcl b/tcl/chip/atmel/at91/rtt.tcl
index d49ce71148..1ef83733bb 100644
--- a/tcl/chip/atmel/at91/rtt.tcl
+++ b/tcl/chip/atmel/at91/rtt.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 set RTTC_RTMR [expr {$AT91C_BASE_RTTC + 0x00}]
 set RTTC_RTAR [expr {$AT91C_BASE_RTTC + 0x04}]
diff --git a/tcl/chip/atmel/at91/sam9_smc.cfg b/tcl/chip/atmel/at91/sam9_smc.cfg
index 0628d4d18d..87880c7690 100644
--- a/tcl/chip/atmel/at91/sam9_smc.cfg
+++ b/tcl/chip/atmel/at91/sam9_smc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Setup register
 #
 # ncs_read_setup
diff --git a/tcl/chip/atmel/at91/usarts.tcl b/tcl/chip/atmel/at91/usarts.tcl
index 253b7fbfcc..62a651bbdc 100644
--- a/tcl/chip/atmel/at91/usarts.tcl
+++ b/tcl/chip/atmel/at91/usarts.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # the DBGU and USARTs are 'almost' indentical'
 set DBGU_CR         [expr {$AT91C_BASE_DBGU + 0x00000000}]
 set DBGU_MR         [expr {$AT91C_BASE_DBGU + 0x00000004}]
diff --git a/tcl/chip/st/spear/quirk_no_srst.tcl 
b/tcl/chip/st/spear/quirk_no_srst.tcl
index 551df061d4..e8640f46b5 100644
--- a/tcl/chip/st/spear/quirk_no_srst.tcl
+++ b/tcl/chip/st/spear/quirk_no_srst.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Quirks to bypass missing SRST on JTAG connector
 # EVALSPEAr310 Rev. 2.0
 # http://www.st.com/spear
diff --git a/tcl/chip/st/spear/spear3xx.tcl b/tcl/chip/st/spear/spear3xx.tcl
index 86f2a1d245..474ebe316f 100644
--- a/tcl/chip/st/spear/spear3xx.tcl
+++ b/tcl/chip/st/spear/spear3xx.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Generic init scripts for all ST SPEAr3xx family
 # http://www.st.com/spear
 #
diff --git a/tcl/chip/st/spear/spear3xx_ddr.tcl 
b/tcl/chip/st/spear/spear3xx_ddr.tcl
index 22fe06eaf7..59925672dc 100644
--- a/tcl/chip/st/spear/spear3xx_ddr.tcl
+++ b/tcl/chip/st/spear/spear3xx_ddr.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Init scripts to configure DDR controller of SPEAr3xx
 # http://www.st.com/spear
 # Original values taken from XLoader source code
diff --git a/tcl/chip/st/stm32/stm32.tcl b/tcl/chip/st/stm32/stm32.tcl
index 94b1935dde..3826a57af5 100644
--- a/tcl/chip/st/stm32/stm32.tcl
+++ b/tcl/chip/st/stm32/stm32.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 source [find bitsbytes.tcl]
 source [find cpu/arm/cortex_m3.tcl]
 source [find memory.tcl]
diff --git a/tcl/chip/st/stm32/stm32_rcc.tcl b/tcl/chip/st/stm32/stm32_rcc.tcl
index fa652a2e65..afa4cbfd6a 100644
--- a/tcl/chip/st/stm32/stm32_rcc.tcl
+++ b/tcl/chip/st/stm32/stm32_rcc.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 set RCC_CR            [expr {$RCC_BASE + 0x00}]
 set RCC_CFGR          [expr {$RCC_BASE + 0x04}]
diff --git a/tcl/chip/st/stm32/stm32_regs.tcl b/tcl/chip/st/stm32/stm32_regs.tcl
index 6ae2f63f6b..07ff1aa294 100644
--- a/tcl/chip/st/stm32/stm32_regs.tcl
+++ b/tcl/chip/st/stm32/stm32_regs.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # /* Peripheral and SRAM base address in the alias region */
 set PERIPH_BB_BASE        0x42000000
 set SRAM_BB_BASE          0x22000000
diff --git a/tcl/chip/ti/lm3s/lm3s.tcl b/tcl/chip/ti/lm3s/lm3s.tcl
index 42da8c668a..324aad0650 100644
--- a/tcl/chip/ti/lm3s/lm3s.tcl
+++ b/tcl/chip/ti/lm3s/lm3s.tcl
@@ -1 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 source [find chip/ti/lm3s/lm3s_regs.tcl]
diff --git a/tcl/chip/ti/lm3s/lm3s_regs.tcl b/tcl/chip/ti/lm3s/lm3s_regs.tcl
index cb20812db8..1e86e29e82 100644
--- a/tcl/chip/ti/lm3s/lm3s_regs.tcl
+++ b/tcl/chip/ti/lm3s/lm3s_regs.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #*****************************************************************************
 #
 # The following are defines for the System Control register addresses.
diff --git a/tcl/cpld/altera-5m570z-cpld.cfg b/tcl/cpld/altera-5m570z-cpld.cfg
index 22a422c48b..5dbd0deee8 100644
--- a/tcl/cpld/altera-5m570z-cpld.cfg
+++ b/tcl/cpld/altera-5m570z-cpld.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Altera MAXV 5M24OZ/5M570Z CPLD
 # see MAX V Device Handbook
 # Table 6-3: 32-Bit MAX V Device IDCODE
diff --git a/tcl/cpld/altera-epm240.cfg b/tcl/cpld/altera-epm240.cfg
index ece02bbefc..39c409bc3a 100644
--- a/tcl/cpld/altera-epm240.cfg
+++ b/tcl/cpld/altera-epm240.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Altera MAXII EPM240T100C CPLD
 
 if { [info exists CHIPNAME] } {
diff --git a/tcl/cpld/jtagspi.cfg b/tcl/cpld/jtagspi.cfg
index e720c3959e..7071e5e340 100644
--- a/tcl/cpld/jtagspi.cfg
+++ b/tcl/cpld/jtagspi.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set _USER1 0x02
 
 if { [info exists JTAGSPI_IR] } {
diff --git a/tcl/cpld/lattice-lc4032ze.cfg b/tcl/cpld/lattice-lc4032ze.cfg
index d4a85eb794..479180f28f 100644
--- a/tcl/cpld/lattice-lc4032ze.cfg
+++ b/tcl/cpld/lattice-lc4032ze.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Lattice ispMACH 4000ZE family, device LC4032ZE
 # just configure a tap
 jtag newtap LC4032ZE tap -irlen 8 -expected-id  0x01806043
diff --git a/tcl/cpld/xilinx-xc6s.cfg b/tcl/cpld/xilinx-xc6s.cfg
index 9ce7ad4918..82b87fb415 100644
--- a/tcl/cpld/xilinx-xc6s.cfg
+++ b/tcl/cpld/xilinx-xc6s.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # xilinx spartan6
 # http://www.xilinx.com/support/documentation/user_guides/ug380.pdf
 
diff --git a/tcl/cpld/xilinx-xc7.cfg b/tcl/cpld/xilinx-xc7.cfg
index 4c0502c5db..22e0aea7f9 100644
--- a/tcl/cpld/xilinx-xc7.cfg
+++ b/tcl/cpld/xilinx-xc7.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # xilinx series 7 (artix, kintex, virtex)
 # 
http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
 
diff --git a/tcl/cpld/xilinx-xcf-p.cfg b/tcl/cpld/xilinx-xcf-p.cfg
index 8e0a26c6f7..7b6d384a7c 100644
--- a/tcl/cpld/xilinx-xcf-p.cfg
+++ b/tcl/cpld/xilinx-xcf-p.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 if { [info exists CHIPNAME] } {
        set _CHIPNAME $CHIPNAME
 } else {
diff --git a/tcl/cpld/xilinx-xcf-s.cfg b/tcl/cpld/xilinx-xcf-s.cfg
index a3c79a3854..417ecff690 100644
--- a/tcl/cpld/xilinx-xcf-s.cfg
+++ b/tcl/cpld/xilinx-xcf-s.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 if { [info exists CHIPNAME] } {
        set _CHIPNAME $CHIPNAME
 } else {
diff --git a/tcl/cpld/xilinx-xcr3256.cfg b/tcl/cpld/xilinx-xcr3256.cfg
index e5611f1ec9..4668e54789 100644
--- a/tcl/cpld/xilinx-xcr3256.cfg
+++ b/tcl/cpld/xilinx-xcr3256.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 #xilinx coolrunner xcr3256
 #simple device - just configure a tap
 jtag newtap xcr tap -irlen 5 -ircapture 0x01 -irmask 0x1f -expected-id  
0x0494c093
diff --git a/tcl/cpld/xilinx-xcu.cfg b/tcl/cpld/xilinx-xcu.cfg
index 3270597110..57a59f59a8 100644
--- a/tcl/cpld/xilinx-xcu.cfg
+++ b/tcl/cpld/xilinx-xcu.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Xilinx Ultrascale (Kintex, Virtex, Zynq)
 # 
https://www.xilinx.com/support/documentation/user_guides/ug570-ultrascale-configuration.pdf
 
diff --git a/tcl/cpu/arm/arm7tdmi.tcl b/tcl/cpu/arm/arm7tdmi.tcl
index a1d4a1f462..e407a2396c 100644
--- a/tcl/cpu/arm/arm7tdmi.tcl
+++ b/tcl/cpu/arm/arm7tdmi.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set CPU_TYPE   arm
 set CPU_NAME   arm7tdmi
 set CPU_ARCH   armv4t
diff --git a/tcl/cpu/arm/arm920.tcl b/tcl/cpu/arm/arm920.tcl
index c01f602f2c..1c5a8ad8aa 100644
--- a/tcl/cpu/arm/arm920.tcl
+++ b/tcl/cpu/arm/arm920.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set CPU_TYPE   arm
 set CPU_NAME   arm920
 set CPU_ARCH   armv4t
diff --git a/tcl/cpu/arm/arm946.tcl b/tcl/cpu/arm/arm946.tcl
index a6110a53fd..602d4d700d 100644
--- a/tcl/cpu/arm/arm946.tcl
+++ b/tcl/cpu/arm/arm946.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set CPU_TYPE   arm
 set CPU_NAME   arm946
 set CPU_ARCH   armv5te
diff --git a/tcl/cpu/arm/arm966.tcl b/tcl/cpu/arm/arm966.tcl
index 1fffbc0923..0e64312e0e 100644
--- a/tcl/cpu/arm/arm966.tcl
+++ b/tcl/cpu/arm/arm966.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set CPU_TYPE   arm
 set CPU_NAME   arm966
 set CPU_ARCH   armv5te
diff --git a/tcl/cpu/arm/cortex_m3.tcl b/tcl/cpu/arm/cortex_m3.tcl
index c9950261fd..0791664bba 100644
--- a/tcl/cpu/arm/cortex_m3.tcl
+++ b/tcl/cpu/arm/cortex_m3.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 set CPU_TYPE   arm
 set CPU_NAME   cortex_m3
 set CPU_ARCH   armv7
diff --git a/tcl/fpga/altera-10m50.cfg b/tcl/fpga/altera-10m50.cfg
index d5af710592..1937cb4b63 100644
--- a/tcl/fpga/altera-10m50.cfg
+++ b/tcl/fpga/altera-10m50.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # see MAX 10 FPGA Device Architecture
 # Table 3-1: IDCODE Information for MAX 10 Devices
 # Intel MAX 10M02 0x31810dd
diff --git a/tcl/fpga/altera-ep3c10.cfg b/tcl/fpga/altera-ep3c10.cfg
index 6e8962a53c..7c231f9424 100644
--- a/tcl/fpga/altera-ep3c10.cfg
+++ b/tcl/fpga/altera-ep3c10.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Altera Cyclone III EP3C10
 # see Cyclone III Device Handbook, Volume 1;
 # Table 14–5. 32-Bit Cyclone III Device IDCODE
diff --git a/tcl/fpga/xilinx-dna.cfg b/tcl/fpga/xilinx-dna.cfg
index a8056735b1..56f8c14119 100644
--- a/tcl/fpga/xilinx-dna.cfg
+++ b/tcl/fpga/xilinx-dna.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 proc xilinx_dna_addr {chip} {
        array set addrs {
                Spartan6 0x30
diff --git a/tcl/fpga/xilinx-xadc.cfg b/tcl/fpga/xilinx-xadc.cfg
index 250879ec93..fdaf3a961b 100644
--- a/tcl/fpga/xilinx-xadc.cfg
+++ b/tcl/fpga/xilinx-xadc.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Xilinx XADC support for 7 Series FPGAs
 #
 # The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die
diff --git a/tcl/mem_helper.tcl b/tcl/mem_helper.tcl
index 1c860119a4..0229d54b78 100644
--- a/tcl/mem_helper.tcl
+++ b/tcl/mem_helper.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Helper for common memory read/modify/write procedures
 
 # mrw: "memory read word", returns value of $reg
diff --git a/tcl/memory.tcl b/tcl/memory.tcl
index ac273451dc..b111749954 100644
--- a/tcl/memory.tcl
+++ b/tcl/memory.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # MEMORY
 #
 # All Memory regions have two components.
diff --git a/tcl/mmr_helpers.tcl b/tcl/mmr_helpers.tcl
index 61c58e7ca3..5c37fcfdc1 100644
--- a/tcl/mmr_helpers.tcl
+++ b/tcl/mmr_helpers.tcl
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 proc proc_exists { NAME } {
     set n [info commands $NAME]
diff --git a/tcl/test/selftest.cfg b/tcl/test/selftest.cfg
index 0331b482f5..10efb0c6df 100644
--- a/tcl/test/selftest.cfg
+++ b/tcl/test/selftest.cfg
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
 
 add_help_text selftest "run selftest using working ram <tmpfile> <address> 
<size>"
 
diff --git a/tcl/test/syntax1.cfg b/tcl/test/syntax1.cfg
index 2e66188959..7735ee98cb 100644
--- a/tcl/test/syntax1.cfg
+++ b/tcl/test/syntax1.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 adapter srst delay 200
 jtag_ntrst_delay 200
 
diff --git a/tcl/tools/firmware-recovery.tcl b/tcl/tools/firmware-recovery.tcl
index 9d7e0fce84..6a328cd2e3 100644
--- a/tcl/tools/firmware-recovery.tcl
+++ b/tcl/tools/firmware-recovery.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 echo "\n\nFirmware recovery helpers"
 echo "Use -c firmware_help to get help\n"
 
diff --git a/tcl/tools/memtest.tcl b/tcl/tools/memtest.tcl
index c7fa591f3c..f70f950d73 100644
--- a/tcl/tools/memtest.tcl
+++ b/tcl/tools/memtest.tcl
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # Algorithms by Michael Barr, released into public domain
 # Ported to OpenOCD by Shane Volpe, additional fixes by Paul Fertser
 

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