[PATCH]: a5ae05d966 target/riscv/riscv-013.c: dmi_scan() - making use of dtmcs_idle.

[gerrit]

This is an automated email from Gerrit.

"Paul Robertson <ethelthef...@gmail.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7086

-- gerrit

commit a5ae05d966b8f001e3ba527724a3fff92ed1529d
Author: Ethelthefrog <ethelthef...@gmail.com>
Date:   Thu Jul 14 14:47:09 2022 +0100

    target/riscv/riscv-013.c: dmi_scan() - making use of dtmcs_idle.
    
    RISC-V debug spec section 6.1.4 specifies the 'idle' field in the dtmcs 
register
    as a hint for avoid hitting 'busy' returns during DMI transactions.  This 
patch
    uses this value (stored in info->dtmcs_idle) as a minimum value for 
idle_count.
    
    Signed-off-by: Ethelthefrog <ethelthef...@gmail.com>
    Change-Id: I6147b8225bc9b70b4e4c167a3ea3779bdb5ee3e6

diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index 1b1450a7dc..ae37d3bfc2 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -519,6 +519,13 @@ static dmi_status_t dmi_scan(struct target *target, 
uint32_t *address_in,
        if (exec)
                idle_count += info->ac_busy_delay;
 
+       /* The target can request a minimum number of TCK cycles in RunTest/Idle
+          to enable clock-domain-crossing logic to get values from the JTAG
+          domain to the core clock domain and back again. */
+       int min_idle_count = ((int)info->dtmcs_idle)-1;
+       if (idle_count < min_idle_count)
+               idle_count = min_idle_count;
+
        if (idle_count)
                jtag_add_runtest(idle_count, TAP_IDLE);
 

--