This is an automated email from Gerrit.
"Asier Llano <asierll...@gmail.com>" just uploaded a new patch set to Gerrit,
which you can find at https://review.openocd.org/c/openocd/+/7093
-- gerrit
commit 5998b54aef4664327b805579add452ecafda6b4c
Author: Asier Llano <all...@hubbell.com>
Date: Thu Jul 21 12:37:40 2022 +0200
rtos: Support more stackings in ThreadX/FreeRTOS
Support for Cortex M4, Cortex M4F and Cortex M33 has been included
in ThreadX. Support for Cortex M33 has been integrated in FreeRTOS.
Most of the code has been moving part of the code from FreeRTOS
to the the rtos_standard_stackings so both FreeRTOS and ThreadX
use the same stackings code, as it depends on the microcontroller
and not the RTOS.
It has been tested in a MSP432P4111 (Cortex M4F) and
STM32U575 (Cortex M33). Nevertheless, the support for Cortex M3
and similar platforms should be mantained as it has been moved
without change.
Others RTOS systems could be benefited by this refactorization
and support more cores easily.
Signed-off-by: Asier Llano <all...@hubbell.com>
Change-Id: I78118be2809e2de851e527632de05985bc5f8e44
diff --git a/src/rtos/FreeRTOS.c b/src/rtos/FreeRTOS.c
index f7ce8cd564..8ca39657c0 100644
--- a/src/rtos/FreeRTOS.c
+++ b/src/rtos/FreeRTOS.c
@@ -48,9 +48,7 @@ struct freertos_params {
const unsigned char list_elem_content_offset;
const unsigned char thread_stack_offset;
const unsigned char thread_name_offset;
- const struct rtos_register_stacking *stacking_info_cm3;
- const struct rtos_register_stacking *stacking_info_cm4f;
- const struct rtos_register_stacking *stacking_info_cm4f_fpu;
+ const struct rtos_register_stacking* (*fn_get_stacking_info)(const
struct rtos *rtos, int64_t stack_ptr);
};
static const struct freertos_params freertos_params_list[] = {
@@ -64,9 +62,7 @@ static const struct freertos_params freertos_params_list[] = {
12, /*
list_elem_content_offset */
0, /* thread_stack_offset;
*/
52, /* thread_name_offset;
*/
- &rtos_standard_cortex_m3_stacking, /* stacking_info */
- &rtos_standard_cortex_m4f_stacking,
- &rtos_standard_cortex_m4f_fpu_stacking,
+ rtos_standard_cortex_m_stacking_get /* fn_get_stacking_info */
},
{
"hla_target", /* target_name */
@@ -78,9 +74,7 @@ static const struct freertos_params freertos_params_list[] = {
12, /*
list_elem_content_offset */
0, /* thread_stack_offset;
*/
52, /* thread_name_offset;
*/
- &rtos_standard_cortex_m3_stacking, /* stacking_info */
- &rtos_standard_cortex_m4f_stacking,
- &rtos_standard_cortex_m4f_fpu_stacking,
+ rtos_standard_cortex_m_stacking_get /* fn_get_stacking_info */
},
{
"nds32_v3", /* target_name */
@@ -92,9 +86,7 @@ static const struct freertos_params freertos_params_list[] = {
12, /*
list_elem_content_offset */
0, /* thread_stack_offset;
*/
52, /* thread_name_offset;
*/
- &rtos_standard_nds32_n1068_stacking, /* stacking_info */
- &rtos_standard_cortex_m4f_stacking,
- &rtos_standard_cortex_m4f_fpu_stacking,
+ rtos_standard_nds32_stacking_get /* fn_get_stacking_info */
},
};
@@ -427,45 +419,13 @@ static int freertos_get_thread_reg_list(struct rtos
*rtos, int64_t thread_id,
LOG_DEBUG("FreeRTOS: Read stack pointer at 0x%" PRIx64 ", value 0x%"
PRIx64,
thread_id + param->thread_stack_offset,
stack_ptr);
-
- /* Check for armv7m with *enabled* FPU, i.e. a Cortex-M4F */
- int cm4_fpu_enabled = 0;
- struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target);
- if (is_armv7m(armv7m_target)) {
- if (armv7m_target->fp_feature == FPV4_SP) {
- /* Found ARM v7m target which includes a FPU */
- uint32_t cpacr;
-
- retval = target_read_u32(rtos->target, FPU_CPACR,
&cpacr);
- if (retval != ERROR_OK) {
- LOG_ERROR("Could not read CPACR register to
check FPU state");
- return -1;
- }
-
- /* Check if CP10 and CP11 are set to full access. */
- if (cpacr & 0x00F00000) {
- /* Found target with enabled FPU */
- cm4_fpu_enabled = 1;
- }
- }
+ const struct rtos_register_stacking *stacking_info =
+ param->fn_get_stacking_info(rtos, stack_ptr);
+ if (!stacking_info) {
+ LOG_ERROR("Unknown stacking info for thread id=0x%" PRIx64,
(uint64_t)thread_id);
+ return -6;
}
-
- if (cm4_fpu_enabled == 1) {
- /* Read the LR to decide between stacking with or without FPU */
- uint32_t lr_svc = 0;
- retval = target_read_u32(rtos->target,
- stack_ptr + 0x20,
- &lr_svc);
- if (retval != ERROR_OK) {
- LOG_OUTPUT("Error reading stack frame from FreeRTOS
thread");
- return retval;
- }
- if ((lr_svc & 0x10) == 0)
- return rtos_generic_stack_read(rtos->target,
param->stacking_info_cm4f_fpu, stack_ptr, reg_list, num_regs);
- else
- return rtos_generic_stack_read(rtos->target,
param->stacking_info_cm4f, stack_ptr, reg_list, num_regs);
- } else
- return rtos_generic_stack_read(rtos->target,
param->stacking_info_cm3, stack_ptr, reg_list, num_regs);
+ return rtos_generic_stack_read(rtos->target, stacking_info, stack_ptr,
reg_list, num_regs);
}
static int freertos_get_symbol_list_to_lookup(struct symbol_table_elem
*symbol_list[])
diff --git a/src/rtos/ThreadX.c b/src/rtos/ThreadX.c
index 4161e63fa1..413ae27996 100644
--- a/src/rtos/ThreadX.c
+++ b/src/rtos/ThreadX.c
@@ -146,9 +146,9 @@ static const struct threadx_params threadx_params_list[] = {
40, /*
thread_name_offset; */
48, /*
thread_state_offset; */
136, /* thread_next_offset */
- &rtos_standard_cortex_m3_stacking, /* stacking_info */
+ NULL, /* stacking_info */
1, /*
stacking_info_nb */
- NULL, /* fn_get_stacking_info
*/
+ rtos_standard_cortex_m_stacking_get, /* fn_get_stacking_info */
NULL, /*
fn_is_thread_id_valid */
},
{
@@ -182,9 +182,9 @@ static const struct threadx_params threadx_params_list[] = {
40, /*
thread_name_offset; */
48, /*
thread_state_offset; */
136, /* thread_next_offset */
- &rtos_standard_cortex_m3_stacking, /* stacking_info */
+ NULL, /* stacking_info */
1, /*
stacking_info_nb */
- NULL, /* fn_get_stacking_info
*/
+ &rtos_standard_cortex_m_stacking_get, /* fn_get_stacking_info */
NULL, /*
fn_is_thread_id_valid */
},
};
diff --git a/src/rtos/rtos_standard_stackings.c
b/src/rtos/rtos_standard_stackings.c
index fe890413fa..c8637ddf3f 100644
--- a/src/rtos/rtos_standard_stackings.c
+++ b/src/rtos/rtos_standard_stackings.c
@@ -22,6 +22,7 @@
#include "rtos.h"
#include "target/armv7m.h"
+#include "target/cortex_m.h"
static const struct stack_register_offset
rtos_standard_cortex_m3_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
{ ARMV7M_R0, 0x20, 32 }, /* r0 */
@@ -256,7 +257,7 @@ const struct rtos_register_stacking
rtos_standard_cortex_m3_stacking = {
.register_offsets = rtos_standard_cortex_m3_stack_offsets
};
-const struct rtos_register_stacking rtos_standard_cortex_m4f_stacking = {
+static const struct rtos_register_stacking rtos_standard_cortex_m4f_stacking =
{
.stack_registers_size = 0x44,
.stack_growth_direction = -1,
.num_output_registers = ARMV7M_NUM_CORE_REGS,
@@ -264,7 +265,7 @@ const struct rtos_register_stacking
rtos_standard_cortex_m4f_stacking = {
.register_offsets = rtos_standard_cortex_m4f_stack_offsets
};
-const struct rtos_register_stacking rtos_standard_cortex_m4f_fpu_stacking = {
+static const struct rtos_register_stacking
rtos_standard_cortex_m4f_fpu_stacking = {
.stack_registers_size = 0xcc,
.stack_growth_direction = -1,
.num_output_registers = ARMV7M_NUM_CORE_REGS,
@@ -280,10 +281,62 @@ const struct rtos_register_stacking
rtos_standard_cortex_r4_stacking = {
.register_offsets = rtos_standard_cortex_r4_stack_offsets
};
-const struct rtos_register_stacking rtos_standard_nds32_n1068_stacking = {
+static const struct rtos_register_stacking rtos_standard_nds32_n1068_stacking
= {
.stack_registers_size = 0x90,
.stack_growth_direction = -1,
.num_output_registers = 32,
.calculate_process_stack = rtos_generic_stack_align8,
.register_offsets = rtos_standard_nds32_n1068_stack_offsets
};
+
+const struct rtos_register_stacking *
+ rtos_standard_cortex_m_stacking_get(const struct rtos *rtos, int64_t
stack_ptr)
+{
+ /* Check for armv7m with *enabled* FPU, i.e. a Cortex-M4F */
+ struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target);
+ if (!is_armv7m(armv7m_target))
+ return &rtos_standard_cortex_m3_stacking;
+
+ if (armv7m_target->arm.arch == ARM_ARCH_V8M)
+ return &rtos_standard_cortex_m4f_stacking;
+
+ /* Detect the presence of FPU */
+ int fpu_enabled = 0;
+ if (armv7m_target->fp_feature == FPV4_SP) {
+ /* Found ARM v7m target which includes a FPU */
+ uint32_t cpacr;
+ int retval = target_read_u32(rtos->target, FPU_CPACR, &cpacr);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Could not read CPACR register to check FPU
state");
+ return NULL;
+ }
+ /* Check if CP10 and CP11 are set to full access. */
+ if (cpacr & 0x00F00000) {
+ /* Found target with enabled FPU */
+ fpu_enabled = 1;
+ }
+ }
+ if (fpu_enabled == 1) {
+ /* Read the LR to decide between stacking with or without FPU */
+ uint32_t lr_svc = 0;
+ int retval = target_read_u32(rtos->target, stack_ptr + 0x20,
&lr_svc);
+ if (retval != ERROR_OK) {
+ LOG_OUTPUT("Error reading stack frame from rtos
thread");
+ return NULL;
+ }
+ if ((lr_svc & 0x10) == 0)
+ return &rtos_standard_cortex_m4f_fpu_stacking;
+ else
+ return &rtos_standard_cortex_m4f_stacking;
+ } else
+ return &rtos_standard_cortex_m3_stacking;
+}
+
+const struct rtos_register_stacking *
+ rtos_standard_nds32_stacking_get(const struct rtos *rtos, int64_t
stack_ptr)
+{
+ const struct rtos_register_stacking *r =
rtos_standard_cortex_m_stacking_get(rtos, stack_ptr);
+ if (r == &rtos_standard_cortex_m3_stacking)
+ r = &rtos_standard_nds32_n1068_stacking;
+ return r;
+}
diff --git a/src/rtos/rtos_standard_stackings.h
b/src/rtos/rtos_standard_stackings.h
index d18f1797c6..9e0ca8ccc1 100644
--- a/src/rtos/rtos_standard_stackings.h
+++ b/src/rtos/rtos_standard_stackings.h
@@ -26,10 +26,8 @@
#include "rtos.h"
extern const struct rtos_register_stacking rtos_standard_cortex_m3_stacking;
-extern const struct rtos_register_stacking rtos_standard_cortex_m4f_stacking;
-extern const struct rtos_register_stacking
rtos_standard_cortex_m4f_fpu_stacking;
extern const struct rtos_register_stacking rtos_standard_cortex_r4_stacking;
-extern const struct rtos_register_stacking rtos_standard_nds32_n1068_stacking;
+
target_addr_t rtos_generic_stack_align8(struct target *target,
const uint8_t *stack_data, const struct rtos_register_stacking
*stacking,
target_addr_t stack_ptr);
@@ -37,4 +35,10 @@ target_addr_t rtos_cortex_m_stack_align(struct target
*target,
const uint8_t *stack_data, const struct rtos_register_stacking
*stacking,
target_addr_t stack_ptr, size_t xpsr_offset);
+const struct rtos_register_stacking *
+ rtos_standard_cortex_m_stacking_get(const struct rtos *rtos, int64_t
stack_ptr);
+
+const struct rtos_register_stacking *
+ rtos_standard_nds32_stacking_get(const struct rtos *rtos, int64_t
stack_ptr);
+
#endif /* OPENOCD_RTOS_RTOS_STANDARD_STACKINGS_H */
--
