[PATCH]: de595c7a21 target/cortex_m: supress historical reset detection

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/7109

-- gerrit

commit de595c7a218d33776e961e1d74e763336bb0cf61
Author: Tomas Vanek <van...@fbl.cz>
Date:   Tue Aug 2 11:44:43 2022 +0200

    target/cortex_m: supress historical reset detection
    
    The S_RESET_ST sticky bit is reset after DHCSR read.
    It is set at power-on reset and keeps active until the debuger reads DHCSR.
    
    Ignore S_RESET_ST at the very first read after OpenOCD start
    and suppress possibly misleading message "external reset detected"
    if we cannot guarantee the reset happened recently.
    
    Change-Id: I15217c2ca6f69ac97aff8be86bce67cba94a42cd
    Signed-off-by: Tomas Vanek <van...@fbl.cz>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 9497aa0373..043b3af100 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -118,6 +118,7 @@ static inline void cortex_m_cumulate_dhcsr_sticky(struct 
cortex_m_common *cortex
                uint32_t dhcsr)
 {
        cortex_m->dcb_dhcsr_cumulated_sticky |= dhcsr;
+       cortex_m->dcb_dhcsr_sticky_is_recent = true;
 }
 
 /** Read DCB DHCSR register to cortex_m->dcb_dhcsr and cumulate
@@ -2396,6 +2397,18 @@ int cortex_m_examine(struct target *target)
                retval = target_read_u32(target, DCB_DHCSR, 
&cortex_m->dcb_dhcsr);
                if (retval != ERROR_OK)
                        return retval;
+
+               /*  Don't cumulate sticky S_RESET_ST at the very first read of 
DHCSR
+                *  as S_RESET_ST may indicate a reset that happened long time 
ago
+                *  (most probably the power-on reset before OpenOCD was 
started).
+                *  As we are just initializing the debug system we do not need
+                *  to call cortex_m_endreset_event() in the folowing poll.
+                */
+               if (!cortex_m->dcb_dhcsr_sticky_is_recent
+                              && cortex_m->dcb_dhcsr & S_RESET_ST) {
+                       LOG_TARGET_DEBUG(target, "reset happened some time ago, 
ignore");
+                       cortex_m->dcb_dhcsr &= ~S_RESET_ST;
+               }
                cortex_m_cumulate_dhcsr_sticky(cortex_m, cortex_m->dcb_dhcsr);
 
                if (!(cortex_m->dcb_dhcsr & C_DEBUGEN)) {
diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 3f0d55c1c2..4243b50841 100644
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -204,6 +204,8 @@ struct cortex_m_common {
        /* Context information */
        uint32_t dcb_dhcsr;
        uint32_t dcb_dhcsr_cumulated_sticky;
+       /* DCB DHCSR has been at least once read, so the sticky bits have been 
reset */
+       bool dcb_dhcsr_sticky_is_recent;
        uint32_t nvic_dfsr;  /* Debug Fault Status Register - shows reason for 
debug halt */
        uint32_t nvic_icsr;  /* Interrupt Control State Register - shows active 
and pending IRQ */
 

--