[PATCH]: fcf791e946 target/xtensa: replace LOG_XXX with LOG_TARGET_XXX

[gerrit]

This is an automated email from Gerrit.

"Erhan Kurubas <erhan.kuru...@espressif.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7232

-- gerrit

commit fcf791e94672b2243fe31a7c199ebf49ce85b5bd
Author: Erhan Kurubas <erhan.kuru...@espressif.com>
Date:   Thu Sep 29 00:32:36 2022 +0200

    target/xtensa: replace LOG_XXX with LOG_TARGET_XXX
    
    Especially for the smp targets better to print target name.
    
    Signed-off-by: Erhan Kurubas <erhan.kuru...@espressif.com>
    Change-Id: Idcfc2a36b34240d33f372dcb82d44c49bd195ed8

diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index 4dfff6ab41..37fc5dee75 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -781,7 +781,7 @@ int xtensa_examine(struct target *target)
        struct xtensa *xtensa = target_to_xtensa(target);
        unsigned int cmd = PWRCTL_DEBUGWAKEUP(xtensa) | 
PWRCTL_MEMWAKEUP(xtensa) | PWRCTL_COREWAKEUP(xtensa);
 
-       LOG_DEBUG("coreid = %d", target->coreid);
+       LOG_TARGET_DEBUG(target, "examine");
 
        if (xtensa->core_config->core_type == XT_UNDEF) {
                LOG_ERROR("XTensa core not configured; is 
xtensa-core-openocd.cfg missing?");
@@ -796,10 +796,10 @@ int xtensa_examine(struct target *target)
        if (res != ERROR_OK)
                return res;
        if (!xtensa_dm_is_online(&xtensa->dbg_mod)) {
-               LOG_ERROR("Unexpected OCD_ID = %08" PRIx32, 
xtensa->dbg_mod.device_id);
+               LOG_TARGET_ERROR(target, "Unexpected OCD_ID = %08" PRIx32, 
xtensa->dbg_mod.device_id);
                return ERROR_TARGET_FAILURE;
        }
-       LOG_DEBUG("OCD_ID = %08" PRIx32, xtensa->dbg_mod.device_id);
+       LOG_TARGET_DEBUG(target, "OCD_ID = %08" PRIx32, 
xtensa->dbg_mod.device_id);
        if (!target_was_examined(target))
                target_set_examined(target);
        xtensa_smpbreak_write(xtensa, xtensa->smp_break);
@@ -2099,6 +2099,8 @@ int xtensa_poll(struct target *target)
                                halt_cause,
                                xtensa_reg_get(target, XT_REG_IDX_EXCCAUSE),
                                xtensa->dbg_mod.core_status.dsr);
+                       LOG_TARGET_INFO(target, "Target halted, PC=0x%08" 
PRIX32 ", debug_reason=%08x",
+                               xtensa_reg_get(target, XT_REG_IDX_PC), 
target->debug_reason);
                        xtensa_dm_core_status_clear(
                                &xtensa->dbg_mod,
                                OCDDSR_DEBUGPENDBREAK | OCDDSR_DEBUGINTBREAK | 
OCDDSR_DEBUGPENDTRAX |
@@ -2277,7 +2279,7 @@ int xtensa_breakpoint_add(struct target *target, struct 
breakpoint *breakpoint)
                        break;
        }
        if (slot == xtensa->core_config->debug.ibreaks_num) {
-               LOG_TARGET_ERROR(target, "No free slots to add HW breakpoint!");
+               LOG_TARGET_DEBUG(target, "No free slots to add HW breakpoint!");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
@@ -2318,7 +2320,7 @@ int xtensa_breakpoint_remove(struct target *target, 
struct breakpoint *breakpoin
                        break;
        }
        if (slot == xtensa->core_config->debug.ibreaks_num) {
-               LOG_TARGET_ERROR(target, "HW breakpoint not found!");
+               LOG_TARGET_DEBUG(target, "HW breakpoint not found!");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
        xtensa->hw_brps[slot] = NULL;

--