Registered in the mail list and repost this bug report again. peng cheng <thomas.pch...@gmail.com> 于2022年10月12日周三 12:08写道：
> Hi all, > > Hope everyone had a nice day! > > Don't know whether this is the correct place, but please forward it if I > am wrong. > > Found this tricky issue when using the RISC-V user4 JTAG tunnel on the > VCU128 FPGA Xilinx board. > > The user4 IR is totally wrongly set in this bit of codes > > > https://github.com/openocd-org/openocd/blob/master/src/target/riscv/riscv.c#L455 > > uint32_t ir_user4_raw = 0x23 << (target->tap->ir_length - 6); > > The correct one is 0x23924 for VCU128, and below is my temporary change to > fix this. > > - uint32_t ir_user4_raw = 0x23 << (target->tap->ir_length - > 6); > + //uint32_t ir_user4_raw = 0x23 << (target->tap->ir_length - 6); > + uint32_t ir_user4_raw = 0x23924; > + printf("ir user4 change to 0x23924\n"); > > IMO, the correct user4 IR should be set on the command line, something > like ``--set-user4-ir`. > Please let me know if I am correct and maybe discuss how to fix it. > > Thanks! > > BR, > Peng >
