This is an automated email from Gerrit.
"Lorenz Brun <lor...@brun.one>" just uploaded a new patch set to Gerrit, which
you can find at https://review.openocd.org/c/openocd/+/7419
-- gerrit
commit de4fe8e7d552e7b52091807a857b060cb0642ae9
Author: Lorenz Brun <lor...@brun.one>
Date: Sat Dec 24 03:56:22 2022 +0100
target/ti-cjtag: make switching to JTAG more reliable
The current cJTAG to JTAG switching commands for TI chips are not
particularly reliable, especially on chips with accurate timing.
On a Raspberry Pi the existing sequence has (depending on cabling and
chip) a ~50% chance of working, on a much better-behaved FT2232H
it doesn't manage to enable full JTAG at all.
This change runs a bunch of test-idle cycles before actually attempting
to switch to full JTAG. This makes the switch reliable even at high
clock speeds (>100kHz) and from precise sources like the FT2232H.
Thanks to Phil Wiggum in the issue tracker for the suggestion!
Change-Id: I9293e884bf3e9606d529756ae4483b844d3c39db
Bug: 374
Signed-off-by: Lorenz Brun <lor...@brun.one>
diff --git a/tcl/target/ti-cjtag.cfg b/tcl/target/ti-cjtag.cfg
index d5e13e269a..97111f1cc4 100644
--- a/tcl/target/ti-cjtag.cfg
+++ b/tcl/target/ti-cjtag.cfg
@@ -5,6 +5,7 @@
# Read section 6.3 in http://www.ti.com/lit/pdf/swru319 for more information.
proc ti_cjtag_to_4pin_jtag {jrc} {
# Bypass
+ runtest 20
irscan $jrc 0x3f -endstate RUN/IDLE
# Two zero bit scans and a one bit drshift
pathmove RUN/IDLE DRSELECT DRCAPTURE DREXIT1 DRPAUSE
--
