This is an automated email from Gerrit. "Matthijs Kooijman <matth...@stdin.nl>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7612
-- gerrit commit 3248998224dc4b189bf4e2977ceb45dcb75c6495 Author: Matthijs Kooijman <matth...@stdin.nl> Date: Thu Apr 27 10:06:33 2023 +0200 flash/nor/stm32f2x: Fix setting OTP sector protection This fixes three problems: - The loop checked the wrong variable, so it would loop infinitely (try to protect all sectors after the first requested, and then try to read and/or or write to system ROM after the OTP and eventually error out when passing the end of the system ROM area). - It treated a non-zero value as locked when checking the current status before writing and the actual writing used 0xff as locked, while in reality a value of 0x00 means a locked sector. In practice, this means that it would skip unlocked sectors and try to write to locked sectors (and fail). - The code did not perform the FLASH_KEYR sequence to unlock the FLASH_CR register and enable flash programming with the FLASH_PG bit (like the regular flash erase/write code does), which caused the writes to silently fail. In addition, the `i` variable was made unsigned to match the `first` and `last` arguments and prevent a signedness mismatch warning. Change-Id: Ib4a3e35cfe743731b760d198309cdd6e8a4833c7 Signed-off-by: Matthijs Kooijman <matth...@stdin.nl> diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index 36b7a0da53..6b16def8bc 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -532,27 +532,39 @@ static int stm32x_otp_protect(struct flash_bank *bank, unsigned int first, { struct target *target = bank->target; uint32_t lock_base; - int i, retval; + unsigned int i, retval; uint8_t lock; assert((first <= last) && (last < bank->num_sectors)); + retval = stm32x_unlock_reg(target); + if (retval != ERROR_OK) + return retval; + + retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG); + if (retval != ERROR_OK) + return retval; + lock_base = stm32x_otp_is_f7(bank) ? STM32F7_OTP_LOCK_BASE : STM32F2_OTP_LOCK_BASE; - for (i = first; first <= last; i++) { + for (i = first; i <= last; i++) { retval = target_read_u8(target, lock_base + i, &lock); if (retval != ERROR_OK) return retval; - if (lock) + if (lock == 0x00) continue; - lock = 0xff; + lock = 0x00; retval = target_write_u8(target, lock_base + i, lock); if (retval != ERROR_OK) return retval; } + retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK); + if (retval != ERROR_OK) + return retval; + return ERROR_OK; } --